| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_ci_smumgr.c | 2776 struct SMU7_Discrete_MemoryLevel *mclk_levels = local in function:ci_update_dpm_settings
2825 if (mclk_levels[i].ActivityLevel !=
2827 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2833 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2837 if (mclk_levels[i].UpH != setting->mclk_up_hyst ||
2838 mclk_levels[i].DownH != setting->mclk_down_hyst) {
2839 mclk_levels[i].UpH = setting->mclk_up_hyst;
2840 mclk_levels[i].DownH = setting->mclk_down_hyst;
2847 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t));
2848 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t))
[all...] |
| amdgpu_fiji_smumgr.c | 2565 struct SMU73_Discrete_MemoryLevel *mclk_levels = local in function:fiji_update_dpm_settings
2614 if (mclk_levels[i].ActivityLevel !=
2616 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2622 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2626 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
2627 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
2628 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
2629 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
2636 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
2637 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
| amdgpu_polaris10_smumgr.c | 2481 struct SMU74_Discrete_MemoryLevel *mclk_levels = local in function:polaris10_update_dpm_settings
2530 if (mclk_levels[i].ActivityLevel !=
2532 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2538 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2542 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
2543 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
2544 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
2545 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
2552 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
2553 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
| amdgpu_tonga_smumgr.c | 3164 struct SMU72_Discrete_MemoryLevel *mclk_levels = local in function:tonga_update_dpm_settings
3213 if (mclk_levels[i].ActivityLevel !=
3215 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
3221 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
3225 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
3226 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
3227 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
3228 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
3235 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
3236 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
| amdgpu_ci_smumgr.c | 2776 struct SMU7_Discrete_MemoryLevel *mclk_levels = local in function:ci_update_dpm_settings
2825 if (mclk_levels[i].ActivityLevel !=
2827 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2833 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2837 if (mclk_levels[i].UpH != setting->mclk_up_hyst ||
2838 mclk_levels[i].DownH != setting->mclk_down_hyst) {
2839 mclk_levels[i].UpH = setting->mclk_up_hyst;
2840 mclk_levels[i].DownH = setting->mclk_down_hyst;
2847 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t));
2848 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t))
[all...] |
| amdgpu_fiji_smumgr.c | 2565 struct SMU73_Discrete_MemoryLevel *mclk_levels = local in function:fiji_update_dpm_settings
2614 if (mclk_levels[i].ActivityLevel !=
2616 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2622 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2626 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
2627 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
2628 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
2629 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
2636 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
2637 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
| amdgpu_polaris10_smumgr.c | 2481 struct SMU74_Discrete_MemoryLevel *mclk_levels = local in function:polaris10_update_dpm_settings
2530 if (mclk_levels[i].ActivityLevel !=
2532 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
2538 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
2542 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
2543 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
2544 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
2545 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
2552 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
2553 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
| amdgpu_tonga_smumgr.c | 3164 struct SMU72_Discrete_MemoryLevel *mclk_levels = local in function:tonga_update_dpm_settings
3213 if (mclk_levels[i].ActivityLevel !=
3215 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity);
3221 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t));
3225 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst ||
3226 mclk_levels[i].DownHyst != setting->mclk_down_hyst) {
3227 mclk_levels[i].UpHyst = setting->mclk_up_hyst;
3228 mclk_levels[i].DownHyst = setting->mclk_down_hyst;
3235 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
3236 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t))
[all...] |
