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Searched defs:me_cntl (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_cik_sdma.c	`338 u32 me_cntl, reg_offset; local in function:cik_sdma_enable 351 me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); 353 me_cntl &= ~SDMA_HALT; 355 me_cntl \|= SDMA_HALT; 356 WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl);`
radeon_cik_sdma.c	`338 u32 me_cntl, reg_offset; local in function:cik_sdma_enable 351 me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); 353 me_cntl &= ~SDMA_HALT; 355 me_cntl \|= SDMA_HALT; 356 WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl);`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_cik_sdma.c	`411 u32 me_cntl; local in function:cik_sdma_enable 420 me_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]); 422 me_cntl &= ~SDMA0_F32_CNTL__HALT_MASK; 424 me_cntl \|= SDMA0_F32_CNTL__HALT_MASK; 425 WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], me_cntl);`
amdgpu_cik_sdma.c	`411 u32 me_cntl; local in function:cik_sdma_enable 420 me_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]); 422 me_cntl &= ~SDMA0_F32_CNTL__HALT_MASK; 424 me_cntl \|= SDMA0_F32_CNTL__HALT_MASK; 425 WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], me_cntl);`

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