| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_uvd_v1_0.c | 276 u32 mp_swap_cntl = 0; local in function:uvd_v1_0_start
306 mp_swap_cntl = 0;
309 WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| radeon_uvd_v1_0.c | 276 u32 mp_swap_cntl = 0; local in function:uvd_v1_0_start
306 mp_swap_cntl = 0;
309 WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_uvd_v4_2.c | 267 u32 mp_swap_cntl = 0; local in function:uvd_v4_2_start
288 mp_swap_cntl = 0;
291 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v5_0.c | 302 uint32_t mp_swap_cntl; local in function:uvd_v5_0_start
310 mp_swap_cntl = 0;
340 mp_swap_cntl = 0;
343 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v4_2.c | 267 u32 mp_swap_cntl = 0; local in function:uvd_v4_2_start
288 mp_swap_cntl = 0;
291 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v5_0.c | 302 uint32_t mp_swap_cntl; local in function:uvd_v5_0_start
310 mp_swap_cntl = 0;
340 mp_swap_cntl = 0;
343 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v6_0.c | 709 uint32_t mp_swap_cntl; local in function:uvd_v6_0_start
717 mp_swap_cntl = 0;
756 mp_swap_cntl = 0;
759 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v7_0.c | 942 uint32_t mp_swap_cntl; local in function:uvd_v7_0_start
955 mp_swap_cntl = 0;
1001 mp_swap_cntl = 0;
1004 WREG32_SOC15(UVD, k, mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v6_0.c | 709 uint32_t mp_swap_cntl; local in function:uvd_v6_0_start
717 mp_swap_cntl = 0;
756 mp_swap_cntl = 0;
759 WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
| amdgpu_uvd_v7_0.c | 942 uint32_t mp_swap_cntl; local in function:uvd_v7_0_start
955 mp_swap_cntl = 0;
1001 mp_swap_cntl = 0;
1004 WREG32_SOC15(UVD, k, mmUVD_MP_SWAP_CNTL, mp_swap_cntl);
|
