/src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/microchip/ |
mpfs-m100pfs-fabric.dtsi | 17 pcie: pcie@2000000000 { label 18 compatible = "microchip,pcie-host-1.0"; 36 msi-parent = <&pcie>;
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mpfs-polarberry-fabric.dtsi | 17 pcie: pcie@2000000000 { label 18 compatible = "microchip,pcie-host-1.0"; 36 msi-parent = <&pcie>;
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mpfs-m100pfs-fabric.dtsi | 17 pcie: pcie@2000000000 { label 18 compatible = "microchip,pcie-host-1.0"; 36 msi-parent = <&pcie>;
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mpfs-polarberry-fabric.dtsi | 17 pcie: pcie@2000000000 { label 18 compatible = "microchip,pcie-host-1.0"; 36 msi-parent = <&pcie>;
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mpfs-icicle-kit-fabric.dtsi | 29 pcie: pcie@3000000000 { label 30 compatible = "microchip,pcie-host-1.0"; 49 msi-parent = <&pcie>;
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mpfs-icicle-kit-fabric.dtsi | 29 pcie: pcie@3000000000 { label 30 compatible = "microchip,pcie-host-1.0"; 49 msi-parent = <&pcie>;
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pci/ |
priv.h | 29 } pcie; member in struct:nvkm_pci_func 41 /* pcie functions */
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priv.h | 29 } pcie; member in struct:nvkm_pci_func 41 /* pcie functions */
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/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
imx7d.dtsi | 120 pcie_phy: pcie-phy@306d0000 { 121 compatible = "fsl,imx7d-pcie-phy"; 166 pcie: pcie@33800000 { label 167 compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; 194 clock-names = "pcie", "pcie_bus", "pcie_phy"; 206 fsl,imx7d-pcie-phy = <&pcie_phy>;
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imx7d.dtsi | 120 pcie_phy: pcie-phy@306d0000 { 121 compatible = "fsl,imx7d-pcie-phy"; 166 pcie: pcie@33800000 { label 167 compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; 194 clock-names = "pcie", "pcie_bus", "pcie_phy"; 206 fsl,imx7d-pcie-phy = <&pcie_phy>;
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artpec6.dtsi | 162 pcie: pcie@f8050000 { label 163 compatible = "axis,artpec6-pcie", "snps,dw-pcie"; 185 axis,syscon-pcie = <&syscon>; 190 compatible = "axis,artpec6-pcie-ep", "snps,dw-pcie"; 199 axis,syscon-pcie = <&syscon>;
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artpec6.dtsi | 162 pcie: pcie@f8050000 { label 163 compatible = "axis,artpec6-pcie", "snps,dw-pcie"; 185 axis,syscon-pcie = <&syscon>; 190 compatible = "axis,artpec6-pcie-ep", "snps,dw-pcie"; 199 axis,syscon-pcie = <&syscon>;
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mt7629.dtsi | 364 pcie: pcie@1a140000 { label 365 compatible = "mediatek,mt7629-pcie"; 390 phy-names = "pcie-phy1"; 395 pcie1: pcie@1,0 { 425 pcieport1: pcie-phy@0 {
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mt7629.dtsi | 364 pcie: pcie@1a140000 { label 365 compatible = "mediatek,mt7629-pcie"; 390 phy-names = "pcie-phy1"; 395 pcie1: pcie@1,0 { 425 pcieport1: pcie-phy@0 {
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/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
pci.h | 38 } pcie; member in struct:nvkm_pci 61 /* pcie functions */
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pci.h | 38 } pcie; member in struct:nvkm_pci 61 /* pcie functions */
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/src/sys/arch/arm/apple/ |
apple_platform.c | 169 const int pcie = of_find_bycompat(OF_finddevice("/"), "apple,pcie"); local in function:apple_platform_get_mac_address 170 if (pcie == -1) { 178 for (bridge = OF_child(pcie); bridge; bridge = OF_peer(bridge)) {
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apple_platform.c | 169 const int pcie = of_find_bycompat(OF_finddevice("/"), "apple,pcie"); local in function:apple_platform_get_mac_address 170 if (pcie == -1) { 178 for (bridge = OF_child(pcie); bridge; bridge = OF_peer(bridge)) {
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/hisilicon/ |
hi3798cv200.dtsi | 557 pcie: pcie@9860000 { label in label:soc 558 compatible = "hisilicon,hi3798cv200-pcie";
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hi3798cv200.dtsi | 557 pcie: pcie@9860000 { label in label:soc 558 compatible = "hisilicon,hi3798cv200-pcie";
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/src/sys/arch/arm/acpi/ |
acpi_pci_layerscape_gen4.c | 33 * NXP Layerscape PCIe Gen4 controller (not ECAM compliant) 85 acpi_pci_layerscape_gen4_ccsr_setpage(struct acpi_pci_layerscape_gen4 *pcie, u_int page_index) 89 val = bus_space_read_4(pcie->bst, pcie->bsh, PAB_CTRL); 92 bus_space_write_4(pcie->bst, pcie->bsh, PAB_CTRL, val); 96 acpi_pci_layerscape_gen4_ccsr_read4(struct acpi_pci_layerscape_gen4 *pcie, bus_size_t reg) 102 acpi_pci_layerscape_gen4_ccsr_setpage(pcie, page_index); 103 return bus_space_read_4(pcie->bst, pcie->bsh, page_addr) 154 struct acpi_pci_layerscape_gen4 *pcie = ap->ap_conf_priv; local in function:acpi_pci_layerscape_gen4_conf_read 188 struct acpi_pci_layerscape_gen4 *pcie = ap->ap_conf_priv; local in function:acpi_pci_layerscape_gen4_conf_write 241 struct acpi_pci_layerscape_gen4 *pcie; local in function:acpi_pci_layerscape_gen4_map [all...] |
acpi_pci_layerscape_gen4.c | 33 * NXP Layerscape PCIe Gen4 controller (not ECAM compliant) 85 acpi_pci_layerscape_gen4_ccsr_setpage(struct acpi_pci_layerscape_gen4 *pcie, u_int page_index) 89 val = bus_space_read_4(pcie->bst, pcie->bsh, PAB_CTRL); 92 bus_space_write_4(pcie->bst, pcie->bsh, PAB_CTRL, val); 96 acpi_pci_layerscape_gen4_ccsr_read4(struct acpi_pci_layerscape_gen4 *pcie, bus_size_t reg) 102 acpi_pci_layerscape_gen4_ccsr_setpage(pcie, page_index); 103 return bus_space_read_4(pcie->bst, pcie->bsh, page_addr) 154 struct acpi_pci_layerscape_gen4 *pcie = ap->ap_conf_priv; local in function:acpi_pci_layerscape_gen4_conf_read 188 struct acpi_pci_layerscape_gen4 *pcie = ap->ap_conf_priv; local in function:acpi_pci_layerscape_gen4_conf_write 241 struct acpi_pci_layerscape_gen4 *pcie; local in function:acpi_pci_layerscape_gen4_map [all...] |
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
mt7622.dtsi | 784 pcie: pcie@1a140000 { label 785 compatible = "mediatek,mt7622-pcie"; 815 pcie0: pcie@0,0 { 835 pcie1: pcie@1,0 {
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/socionext/ |
uniphier-pxs3.dtsi | 794 pcie: pcie@66000000 { label 795 compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; 821 phy-names = "pcie-phy"; 833 compatible = "socionext,uniphier-pxs3-pcie-phy";
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
zynqmp.dtsi | 604 pcie: pcie@fd0e0000 { label 605 compatible = "xlnx,nwl-pcie-2.11"; 620 msi-parent = <&pcie>;
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