HomeSort by: relevance | last modified time | path
    Searched defs:rb0_mask (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c 1425 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v6_0_write_harvested_raster_configs
1426 unsigned rb1_mask = rb0_mask << 1;
1428 rb0_mask &= rb_mask;
1430 if (!rb0_mask || !rb1_mask) {
1433 if (!rb0_mask)
1442 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
1443 rb1_mask = rb0_mask << 1;
1444 rb0_mask &= rb_mask;
1446 if (!rb0_mask || !rb1_mask) {
1449 if (!rb0_mask)
    [all...]
amdgpu_gfx_v6_0.c 1425 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v6_0_write_harvested_raster_configs
1426 unsigned rb1_mask = rb0_mask << 1;
1428 rb0_mask &= rb_mask;
1430 if (!rb0_mask || !rb1_mask) {
1433 if (!rb0_mask)
1442 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
1443 rb1_mask = rb0_mask << 1;
1444 rb0_mask &= rb_mask;
1446 if (!rb0_mask || !rb1_mask) {
1449 if (!rb0_mask)
    [all...]
amdgpu_gfx_v7_0.c 1740 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v7_0_write_harvested_raster_configs
1741 unsigned rb1_mask = rb0_mask << 1;
1743 rb0_mask &= rb_mask;
1745 if (!rb0_mask || !rb1_mask) {
1748 if (!rb0_mask) {
1758 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
1759 rb1_mask = rb0_mask << 1;
1760 rb0_mask &= rb_mask;
1762 if (!rb0_mask || !rb1_mask) {
1765 if (!rb0_mask) {
    [all...]
amdgpu_gfx_v7_0.c 1740 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v7_0_write_harvested_raster_configs
1741 unsigned rb1_mask = rb0_mask << 1;
1743 rb0_mask &= rb_mask;
1745 if (!rb0_mask || !rb1_mask) {
1748 if (!rb0_mask) {
1758 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
1759 rb1_mask = rb0_mask << 1;
1760 rb0_mask &= rb_mask;
1762 if (!rb0_mask || !rb1_mask) {
1765 if (!rb0_mask) {
    [all...]
amdgpu_gfx_v8_0.c 3570 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v8_0_write_harvested_raster_configs
3571 unsigned rb1_mask = rb0_mask << 1;
3573 rb0_mask &= rb_mask;
3575 if (!rb0_mask || !rb1_mask) {
3578 if (!rb0_mask) {
3588 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
3589 rb1_mask = rb0_mask << 1;
3590 rb0_mask &= rb_mask;
3592 if (!rb0_mask || !rb1_mask) {
3595 if (!rb0_mask) {
    [all...]
amdgpu_gfx_v8_0.c 3570 unsigned rb0_mask = 1 << (se * rb_per_se); local in function:gfx_v8_0_write_harvested_raster_configs
3571 unsigned rb1_mask = rb0_mask << 1;
3573 rb0_mask &= rb_mask;
3575 if (!rb0_mask || !rb1_mask) {
3578 if (!rb0_mask) {
3588 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
3589 rb1_mask = rb0_mask << 1;
3590 rb0_mask &= rb_mask;
3592 if (!rb0_mask || !rb1_mask) {
3595 if (!rb0_mask) {
    [all...]

Completed in 1306 milliseconds