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    Searched defs:reference_clock (Results 1 - 25 of 40) sorted by relevancy

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/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv730_dpm.c	56 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv730_populate_sclk_value 75 do_div(tmp, reference_clock); 101 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); 176 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:rv730_populate_mclk_value 177 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate);
radeon_rv740_dpm.c	136 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv740_populate_sclk_value 149 do_div(tmp, reference_clock); 169 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); 256 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:rv740_populate_mclk_value 258 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate);
radeon_rv730_dpm.c	56 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv730_populate_sclk_value 75 do_div(tmp, reference_clock); 101 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); 176 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:rv730_populate_mclk_value 177 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate);
radeon_rv740_dpm.c	136 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv740_populate_sclk_value 149 do_div(tmp, reference_clock); 169 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); 256 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:rv740_populate_mclk_value 258 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate);
radeon_rv770.c	801 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv770_get_xclk 808 return reference_clock / 4; 810 return reference_clock;
radeon_rv770.c	801 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv770_get_xclk 808 return reference_clock / 4; 810 return reference_clock;
radeon_cypress_dpm.c	282 u32 reference_clock; local in function:cypress_program_response_times 285 reference_clock = radeon_get_xclk(rdev); 286 mclk_switch_limit = (460 * reference_clock) / 100; 565 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:cypress_populate_mclk_value 567 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate);
radeon_cypress_dpm.c	282 u32 reference_clock; local in function:cypress_program_response_times 285 reference_clock = radeon_get_xclk(rdev); 286 mclk_switch_limit = (460 * reference_clock) / 100; 565 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:cypress_populate_mclk_value 567 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate);
radeon_rv770_dpm.c	323 u32 reference_clock, 341 (8 * fyclk * reference_divider * post_divider) / reference_clock; 408 u32 reference_clock = rdev->clock.mpll.reference_freq; local in function:rv770_populate_mclk_value 422 rv770_calculate_fractional_mpll_feedback_divider(memory_clock, reference_clock, 450 reference_clock, 505 u32 reference_clock = rdev->clock.spll.reference_freq; local in function:rv770_populate_sclk_value 523 do_div(tmp, reference_clock); 548 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); 1710 u32 reference_clock; local in function:rv770_program_response_times 1724 reference_clock = radeon_get_xclk(rdev)     [all...]
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_soc15.c	282 u32 reference_clock = adev->clock.spll.reference_freq; local in function:soc15_get_xclk 285 return reference_clock / 4; 287 return reference_clock;
amdgpu_soc15.c	282 u32 reference_clock = adev->clock.spll.reference_freq; local in function:soc15_get_xclk 285 return reference_clock / 4; 287 return reference_clock;
amdgpu_cik.c	850 u32 reference_clock = adev->clock.spll.reference_freq; local in function:cik_get_xclk 854 return reference_clock / 2; 857 return reference_clock / 4; 859 return reference_clock;
amdgpu_si.c	1239 u32 reference_clock = adev->clock.spll.reference_freq; local in function:si_get_xclk 1248 return reference_clock / 4; 1250 return reference_clock;
amdgpu_vi.c	336 u32 reference_clock = adev->clock.spll.reference_freq; local in function:vi_get_xclk 340 return reference_clock; 348 return reference_clock / 4; 350 return reference_clock;
amdgpu_cik.c	850 u32 reference_clock = adev->clock.spll.reference_freq; local in function:cik_get_xclk 854 return reference_clock / 2; 857 return reference_clock / 4; 859 return reference_clock;
amdgpu_si.c	1239 u32 reference_clock = adev->clock.spll.reference_freq; local in function:si_get_xclk 1248 return reference_clock / 4; 1250 return reference_clock;
amdgpu_vi.c	336 u32 reference_clock = adev->clock.spll.reference_freq; local in function:vi_get_xclk 340 return reference_clock; 348 return reference_clock / 4; 350 return reference_clock;
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_ci_smumgr.c	1077 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); local in function:ci_calculate_mclk_params 1085 /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2 Note: S.I. reference_divider = 1*/ 1086 tmp = (freq_nom / reference_clock); 1090 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; 2135 uint32_t reference_clock; local in function:ci_thermal_setup_fan_table 2190 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); 2192 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
amdgpu_fiji_smumgr.c	916 * clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 2143 uint32_t reference_clock; local in function:fiji_thermal_setup_fan_table 2207 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); 2211 reference_clock) / 1600);
amdgpu_iceland_smumgr.c	810 uint32_t reference_clock; local in function:iceland_calculate_sclk_params 822 reference_clock = atomctrl_get_reference_clock(hwmgr); 853 /* clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 */ 854 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate); 1120 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); local in function:iceland_calculate_mclk_params 1128 /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2 Note: S.I. reference_divider = 1*/ 1129 tmp = (freq_nom / reference_clock); 1135 /* CLKS = reference_clock / (2 * speed_spectrum_rate * reference_divider) * 10 */ 1136 /* = reference_clock * 5 / speed_spectrum_rate */ 1137 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate 2097 uint32_t reference_clock; local in function:iceland_thermal_setup_fan_table     [all...]
amdgpu_polaris10_smumgr.c	2077 uint32_t reference_clock; local in function:polaris10_thermal_setup_fan_table 2145 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); 2149 reference_clock) / 1600);
amdgpu_tonga_smumgr.c	553 uint32_t reference_clock; local in function:tonga_calculate_sclk_params 565 reference_clock = atomctrl_get_reference_clock(hwmgr); 596 /* clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 */ 597 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate); 872 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); local in function:tonga_calculate_mclk_params 880 /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2 Note: S.I. reference_divider = 1*/ 881 tmp = (freq_nom / reference_clock); 887 /* CLKS = reference_clock / (2 * speed_spectrum_rate * reference_divider) * 10 */ 888 /* = reference_clock * 5 / speed_spectrum_rate */ 889 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate 2473 uint32_t reference_clock; local in function:tonga_thermal_setup_fan_table     [all...]
amdgpu_ci_smumgr.c	1077 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); local in function:ci_calculate_mclk_params 1085 /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2 Note: S.I. reference_divider = 1*/ 1086 tmp = (freq_nom / reference_clock); 1090 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; 2135 uint32_t reference_clock; local in function:ci_thermal_setup_fan_table 2190 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); 2192 fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
amdgpu_fiji_smumgr.c	916 * clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 2143 uint32_t reference_clock; local in function:fiji_thermal_setup_fan_table 2207 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); 2211 reference_clock) / 1600);
amdgpu_iceland_smumgr.c	810 uint32_t reference_clock; local in function:iceland_calculate_sclk_params 822 reference_clock = atomctrl_get_reference_clock(hwmgr); 853 /* clks = reference_clock * 10 / (REFDIV + 1) / speed_spectrum_rate / 2 */ 854 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate); 1120 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); local in function:iceland_calculate_mclk_params 1128 /* tmp = (freq_nom / reference_clock * reference_divider) ^ 2 Note: S.I. reference_divider = 1*/ 1129 tmp = (freq_nom / reference_clock); 1135 /* CLKS = reference_clock / (2 * speed_spectrum_rate * reference_divider) * 10 */ 1136 /* = reference_clock * 5 / speed_spectrum_rate */ 1137 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate 2097 uint32_t reference_clock; local in function:iceland_thermal_setup_fan_table     [all...]

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Indexes created Mon Sep 22 13:09:51 GMT 2025