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    Searched defs:regval (Results 1 - 25 of 90) sorted by relevancy

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  /src/sys/arch/netwinder/pci/
pci_machdep.c 17 pcireg_t regval; local in function:netwinder_pci_attach_hook
71 regval = pci_conf_read(pba->pba_pc, tag, 0x40);
72 regval &= 0xff00ff00;
73 regval |= 0x00000022;
74 pci_conf_write(pba->pba_pc, tag, 0x40, regval);
76 regval = pci_conf_read(pba->pba_pc, tag, 0x80);
77 regval &= 0x0000ff00;
78 regval |= 0xe0010002;
79 pci_conf_write(pba->pba_pc, tag, 0x80, regval);
91 regval = pci_conf_read(pba->pba_pc, tag, PCI_CLASS_REG)
    [all...]
pci_machdep.c 17 pcireg_t regval; local in function:netwinder_pci_attach_hook
71 regval = pci_conf_read(pba->pba_pc, tag, 0x40);
72 regval &= 0xff00ff00;
73 regval |= 0x00000022;
74 pci_conf_write(pba->pba_pc, tag, 0x40, regval);
76 regval = pci_conf_read(pba->pba_pc, tag, 0x80);
77 regval &= 0x0000ff00;
78 regval |= 0xe0010002;
79 pci_conf_write(pba->pba_pc, tag, 0x80, regval);
91 regval = pci_conf_read(pba->pba_pc, tag, PCI_CLASS_REG)
    [all...]
pci_machdep.c 17 pcireg_t regval; local in function:netwinder_pci_attach_hook
71 regval = pci_conf_read(pba->pba_pc, tag, 0x40);
72 regval &= 0xff00ff00;
73 regval |= 0x00000022;
74 pci_conf_write(pba->pba_pc, tag, 0x40, regval);
76 regval = pci_conf_read(pba->pba_pc, tag, 0x80);
77 regval &= 0x0000ff00;
78 regval |= 0xe0010002;
79 pci_conf_write(pba->pba_pc, tag, 0x80, regval);
91 regval = pci_conf_read(pba->pba_pc, tag, PCI_CLASS_REG)
    [all...]
  /src/sys/arch/mips/sibyte/pci/
sbpcihb.c 81 uint64_t regval; local in function:sbpcihb_attach
85 regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));
86 host = (regval & M_SYS_PCI_HOST) != 0;
sbpcihb.c 81 uint64_t regval; local in function:sbpcihb_attach
85 regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));
86 host = (regval & M_SYS_PCI_HOST) != 0;
sbpcihb.c 81 uint64_t regval; local in function:sbpcihb_attach
85 regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));
86 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz.c 173 uint64_t regval; local in function:sbbrz_attach
177 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
178 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz.c 173 uint64_t regval; local in function:sbbrz_attach
177 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
178 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz.c 173 uint64_t regval; local in function:sbbrz_attach
177 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
178 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz_pci.c 142 uint64_t regval; local in function:sbbrz_pci_bus_maxdevs
150 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
151 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz_pci.c 142 uint64_t regval; local in function:sbbrz_pci_bus_maxdevs
150 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
151 host = (regval & M_SYS_PCI_HOST) != 0;
sbbrz_pci.c 142 uint64_t regval; local in function:sbbrz_pci_bus_maxdevs
150 regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
151 host = (regval & M_SYS_PCI_HOST) != 0;
  /src/sys/dev/ic/
vga_common.c 50 u_int8_t regval; local in function:vga_common_probe
62 regval = bus_space_read_1(iot, ioh_vga, VGA_MISC_DATAR);
63 mono = !(regval & 1);
90 regval = bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR);
92 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval ^ 0x0f);
95 if (bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR) != (regval ^ 0x0f))
98 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval);
vga_common.c 50 u_int8_t regval; local in function:vga_common_probe
62 regval = bus_space_read_1(iot, ioh_vga, VGA_MISC_DATAR);
63 mono = !(regval & 1);
90 regval = bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR);
92 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval ^ 0x0f);
95 if (bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR) != (regval ^ 0x0f))
98 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval);
vga_common.c 50 u_int8_t regval; local in function:vga_common_probe
62 regval = bus_space_read_1(iot, ioh_vga, VGA_MISC_DATAR);
63 mono = !(regval & 1);
90 regval = bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR);
92 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval ^ 0x0f);
95 if (bus_space_read_1(iot, ioh_vga, VGA_ATC_DATAR) != (regval ^ 0x0f))
98 bus_space_write_1(iot, ioh_vga, VGA_ATC_DATAW, regval);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_opp.c 389 uint32_t regval = enable ? 1 : 0; local in function:opp1_pipe_clock_control
391 REG_UPDATE(OPP_PIPE_CONTROL, OPP_PIPE_CLOCK_EN, regval);
amdgpu_dcn10_opp.c 389 uint32_t regval = enable ? 1 : 0; local in function:opp1_pipe_clock_control
391 REG_UPDATE(OPP_PIPE_CONTROL, OPP_PIPE_CLOCK_EN, regval);
amdgpu_dcn10_opp.c 389 uint32_t regval = enable ? 1 : 0; local in function:opp1_pipe_clock_control
391 REG_UPDATE(OPP_PIPE_CONTROL, OPP_PIPE_CLOCK_EN, regval);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
amdgpu_hw_ddc.c 80 uint32_t regval; local in function:set_config
92 regval = REG_GET_3(gpio.MASK_reg,
106 REG_SET_2(gpio.MASK_reg, regval,
124 REG_SET(gpio.MASK_reg, regval,
133 REG_SET(gpio.MASK_reg, regval,
169 REG_SET(gpio.MASK_reg, regval,
amdgpu_hw_ddc.c 80 uint32_t regval; local in function:set_config
92 regval = REG_GET_3(gpio.MASK_reg,
106 REG_SET_2(gpio.MASK_reg, regval,
124 REG_SET(gpio.MASK_reg, regval,
133 REG_SET(gpio.MASK_reg, regval,
169 REG_SET(gpio.MASK_reg, regval,
amdgpu_hw_ddc.c 80 uint32_t regval; local in function:set_config
92 regval = REG_GET_3(gpio.MASK_reg,
106 REG_SET_2(gpio.MASK_reg, regval,
124 REG_SET(gpio.MASK_reg, regval,
133 REG_SET(gpio.MASK_reg, regval,
169 REG_SET(gpio.MASK_reg, regval,
  /src/sys/arch/hpcmips/dev/
mq200.c 93 unsigned long regval; local in function:mq200_probe
100 regval = bus_space_read_4(iot, ioh, MQ200_PC00R);
102 regval & 0xffff, (regval >> 16) & 0xffff);
103 if (regval != ((MQ200_PRODUCT_ID << 16) | MQ200_VENDOR_ID))
112 unsigned long regval; local in function:mq200_attach
128 regval = mq200_read(sc, MQ200_PC08R);
129 printf("MQ200 Rev.%02lx video controller", regval & 0xff);
mq200.c 93 unsigned long regval; local in function:mq200_probe
100 regval = bus_space_read_4(iot, ioh, MQ200_PC00R);
102 regval & 0xffff, (regval >> 16) & 0xffff);
103 if (regval != ((MQ200_PRODUCT_ID << 16) | MQ200_VENDOR_ID))
112 unsigned long regval; local in function:mq200_attach
128 regval = mq200_read(sc, MQ200_PC08R);
129 printf("MQ200 Rev.%02lx video controller", regval & 0xff);
  /src/sys/dev/i2c/
mt2131.c 131 uint8_t regval; local in function:mt2131_tune_dtv
166 regval = (fr - 27501) / 55000;
168 if(regval > 0x13)
169 regval = 0x13;
171 rv = mt2131_write(sc, UPC_1, regval);
181 rv = mt2131_read(sc, 0x08, &regval);
185 if (( regval & 0x88 ) == 0x88 ) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_hw_sequencer.c 78 uint16_t regval[12]; member in struct:out_csc_color_matrix_type
221 val = output_csc_matrix[i].regval;

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