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    Searched defs:ret_code (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 1123 int ret_code __unused, tmp;
1125 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7, ret_code);
1131 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp, ret_code);
1140 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp, ret_code);
1164 int ret_code __unused = 0;
1170 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1174 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1177 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF, ret_code);
1180 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_JRBC_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1183 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1211 int ret_code; local
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amdgpu_vcn_v2_0.c 1044 int ret_code __unused = 0;
1049 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1053 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1056 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF, ret_code);
1059 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1062 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1144 int ret_code; local
1154 ret_code = 0;
1156 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1158 if (!ret_code) {
    [all...]
amdgpu_vcn_v2_5.c 1274 int ret_code __unused = 0;
1279 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1283 SOC15_WAIT_ON_RREG(UVD, inst_idx, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1286 SOC15_WAIT_ON_RREG(UVD, inst_idx, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF, ret_code);
1289 SOC15_WAIT_ON_RREG(UVD, inst_idx, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
1292 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1374 int ret_code; local
1384 ret_code = 0;
1386 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
1388 if (!ret_code) {
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