| /src/sys/arch/arm/imx/ |
| imxi2cvar.h | 39 struct clk *sc_clk; member in struct:imxi2c_softc
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| imxi2cvar.h | 39 struct clk *sc_clk; member in struct:imxi2c_softc
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| imxpwmvar.h | 41 struct clk *sc_clk; member in struct:imxpwm_softc
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| imxpwmvar.h | 41 struct clk *sc_clk; member in struct:imxpwm_softc
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| /src/sys/arch/arm/fdt/ |
| a9wdt_fdt.c | 64 struct clk *sc_clk; member in struct:a9wdt_fdt_softc
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| a9wdt_fdt.c | 64 struct clk *sc_clk; member in struct:a9wdt_fdt_softc
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| a9ptmr_fdt.c | 57 struct clk *sc_clk; member in struct:a9ptmr_fdt_softc
88 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
89 if (sc->sc_clk == NULL) {
93 if (clk_enable(sc->sc_clk) != 0) {
98 uint32_t rate = clk_get_rate(sc->sc_clk);
165 rate = clk_get_rate(sc->sc_clk);
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| a9tmr_fdt.c | 57 struct clk *sc_clk; member in struct:a9tmr_fdt_softc
88 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
89 if (sc->sc_clk == NULL) {
93 if (clk_enable(sc->sc_clk) != 0) {
98 uint32_t rate = clk_get_rate(sc->sc_clk);
165 rate = clk_get_rate(sc->sc_clk);
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| /src/sys/arch/arm/nvidia/ |
| tegra_fuse.c | 52 struct clk *sc_clk; member in struct:tegra_fuse_softc
88 sc->sc_clk = fdtbus_clock_get(faa->faa_phandle, "fuse");
89 if (sc->sc_clk == NULL) {
125 clk_enable(fuse_softc->sc_clk);
127 clk_disable(fuse_softc->sc_clk);
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| tegra_fuse.c | 52 struct clk *sc_clk; member in struct:tegra_fuse_softc
88 sc->sc_clk = fdtbus_clock_get(faa->faa_phandle, "fuse");
89 if (sc->sc_clk == NULL) {
125 clk_enable(fuse_softc->sc_clk);
127 clk_disable(fuse_softc->sc_clk);
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| tegra_sdhc.c | 62 struct clk *sc_clk; member in struct:tegra_sdhc_softc
189 sc->sc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0);
190 if (sc->sc_clk == NULL) {
202 error = clk_set_rate(sc->sc_clk, 100000000);
204 error = clk_set_rate(sc->sc_clk, 204000000);
210 error = clk_enable(sc->sc_clk);
217 sc->sc.sc_clkbase = clk_get_rate(sc->sc_clk) / 1000;
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| tegra_sdhc.c | 62 struct clk *sc_clk; member in struct:tegra_sdhc_softc
189 sc->sc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0);
190 if (sc->sc_clk == NULL) {
202 error = clk_set_rate(sc->sc_clk, 100000000);
204 error = clk_set_rate(sc->sc_clk, 204000000);
210 error = clk_enable(sc->sc_clk);
217 sc->sc.sc_clkbase = clk_get_rate(sc->sc_clk) / 1000;
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| /src/sys/dev/fdt/ |
| usbnopphy.c | 53 struct clk *sc_clk; member in struct:usbnopphy_softc
87 if (sc->sc_clk != NULL) {
88 error = clk_enable(sc->sc_clk);
102 if (sc->sc_clk != NULL)
103 clk_disable(sc->sc_clk);
133 sc->sc_clk = fdtbus_clock_get(phandle, "main_clk");
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| usbnopphy.c | 53 struct clk *sc_clk; member in struct:usbnopphy_softc
87 if (sc->sc_clk != NULL) {
88 error = clk_enable(sc->sc_clk);
102 if (sc->sc_clk != NULL)
103 clk_disable(sc->sc_clk);
133 sc->sc_clk = fdtbus_clock_get(phandle, "main_clk");
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| fixedclock.c | 71 struct fixedclock_clk sc_clk; member in struct:fixedclock_softc
108 &sc->sc_clk.rate) != 0) {
112 sc->sc_clk.base.domain = &sc->sc_clkdom;
113 sc->sc_clk.base.name = kmem_asprintf("%s", clkname);
114 clk_attach(&sc->sc_clk.base);
117 aprint_normal(": %u Hz fixed clock (%s)\n", sc->sc_clk.rate, clkname);
131 return &sc->sc_clk.base;
139 if (strcmp(name, sc->sc_clk.base.name) != 0)
142 return &sc->sc_clk.base;
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| fixedfactorclock.c | 73 struct fixedfactorclock_clk sc_clk; member in struct:fixedfactorclock_softc
106 of_getprop_uint32(phandle, "clock-div", &sc->sc_clk.div);
107 of_getprop_uint32(phandle, "clock-mult", &sc->sc_clk.mult);
109 if (sc->sc_clk.div == 0 || sc->sc_clk.mult == 0) {
118 sc->sc_clk.base.domain = &sc->sc_clkdom;
119 sc->sc_clk.base.name = name;
120 clk_attach(&sc->sc_clk.base);
124 sc->sc_clk.mult, sc->sc_clk.div)
[all...] |
| mmc_pwrseq_simple.c | 51 struct clk *sc_clk; member in struct:mmcpwrseq_simple_softc
64 if (sc->sc_clk) {
65 error = clk_enable(sc->sc_clk);
127 sc->sc_clk = fdtbus_clock_get(phandle, "ext_clock");
128 if (sc->sc_clk == NULL) {
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| fixedclock.c | 71 struct fixedclock_clk sc_clk; member in struct:fixedclock_softc
108 &sc->sc_clk.rate) != 0) {
112 sc->sc_clk.base.domain = &sc->sc_clkdom;
113 sc->sc_clk.base.name = kmem_asprintf("%s", clkname);
114 clk_attach(&sc->sc_clk.base);
117 aprint_normal(": %u Hz fixed clock (%s)\n", sc->sc_clk.rate, clkname);
131 return &sc->sc_clk.base;
139 if (strcmp(name, sc->sc_clk.base.name) != 0)
142 return &sc->sc_clk.base;
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| /src/sys/arch/arm/nxp/ |
| imx6_usbphy.c | 52 struct clk *sc_clk; member in struct:imx6_usbphy_softc
101 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
102 if (sc->sc_clk == NULL) {
124 error = clk_enable(sc->sc_clk);
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| imx6_ocotp.c | 53 struct clk *sc_clk; member in struct:imxocotp_softc
103 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
104 if (sc->sc_clk == NULL) {
109 error = clk_enable(sc->sc_clk);
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| imx6_usbphy.c | 52 struct clk *sc_clk; member in struct:imx6_usbphy_softc
101 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
102 if (sc->sc_clk == NULL) {
124 error = clk_enable(sc->sc_clk);
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| imx6_ocotp.c | 53 struct clk *sc_clk; member in struct:imxocotp_softc
103 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
104 if (sc->sc_clk == NULL) {
109 error = clk_enable(sc->sc_clk);
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| imx6_spi.c | 48 struct clk *sc_clk; member in struct:imxspi_fdt_softc
123 ifsc->sc_clk = fdtbus_clock_get_index(phandle, 0);
124 if (ifsc->sc_clk == NULL) {
129 error = clk_enable(ifsc->sc_clk);
147 sc->sc_freq = clk_get_rate(ifsc->sc_clk);
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| /src/sys/arch/arm/amlogic/ |
| mesongxl_usb2phy.c | 61 struct clk *sc_clk; member in struct:mesongxl_usb2phy_softc
167 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
168 if (sc->sc_clk == NULL) {
180 if (clk_enable(sc->sc_clk) != 0) {
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| mesongxl_usb2phy.c | 61 struct clk *sc_clk; member in struct:mesongxl_usb2phy_softc
167 sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
168 if (sc->sc_clk == NULL) {
180 if (clk_enable(sc->sc_clk) != 0) {
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