1 /* $NetBSD: a9ptmr_fdt.c,v 1.7 2022/11/05 17:30:06 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.7 2022/11/05 17:30:06 jmcneill Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 38 #include <sys/device.h> 39 #include <sys/intr.h> 40 41 #include <arm/cortex/mpcore_var.h> 42 #include <arm/cortex/a9ptmr_var.h> 43 44 #include <arm/armreg.h> 45 46 #include <dev/fdt/fdtvar.h> 47 #include <arm/fdt/arm_fdtvar.h> 48 49 static int a9ptmr_fdt_match(device_t, cfdata_t, void *); 50 static void a9ptmr_fdt_attach(device_t, device_t, void *); 51 52 static void a9ptmr_fdt_cpu_hatch(void *, struct cpu_info *); 53 static void a9ptmr_fdt_speed_changed(device_t); 54 55 struct a9ptmr_fdt_softc { 56 device_t sc_dev; 57 struct clk *sc_clk; 58 }; 59 60 CFATTACH_DECL_NEW(a9ptmr_fdt, sizeof(struct a9ptmr_fdt_softc), 61 a9ptmr_fdt_match, a9ptmr_fdt_attach, NULL, NULL); 62 63 static const struct device_compatible_entry compat_data[] = { 64 { .compat = "arm,cortex-a9-twd-timer" }, 65 { .compat = "arm,cortex-a5-twd-timer" }, 66 DEVICE_COMPAT_EOL 67 }; 68 69 static int 70 a9ptmr_fdt_match(device_t parent, cfdata_t cf, void *aux) 71 { 72 struct fdt_attach_args * const faa = aux; 73 74 return of_compatible_match(faa->faa_phandle, compat_data); 75 } 76 77 static void 78 a9ptmr_fdt_attach(device_t parent, device_t self, void *aux) 79 { 80 struct a9ptmr_fdt_softc * const sc = device_private(self); 81 struct fdt_attach_args * const faa = aux; 82 const int phandle = faa->faa_phandle; 83 bus_space_handle_t bsh; 84 uint32_t mpidr; 85 bool is_hardclock; 86 87 sc->sc_dev = self; 88 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 89 if (sc->sc_clk == NULL) { 90 aprint_error(": couldn't get clock\n"); 91 return; 92 } 93 if (clk_enable(sc->sc_clk) != 0) { 94 aprint_error(": couldn't enable clock\n"); 95 return; 96 } 97 98 uint32_t rate = clk_get_rate(sc->sc_clk); 99 prop_dictionary_t dict = device_properties(self); 100 prop_dictionary_set_uint32(dict, "frequency", rate); 101 102 char intrstr[128]; 103 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 104 aprint_error(": failed to decode interrupt\n"); 105 return; 106 } 107 108 aprint_naive("\n"); 109 aprint_normal("\n"); 110 111 mpidr = armreg_mpidr_read(); 112 is_hardclock = (mpidr & MPIDR_U) == 0; /* Use private timer for SMP */ 113 114 if (is_hardclock) { 115 void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK, 116 FDT_INTR_MPSAFE, a9ptmr_intr, NULL, device_xname(self)); 117 if (ih == NULL) { 118 aprint_error_dev(self, "couldn't install interrupt handler\n"); 119 return; 120 } 121 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 122 } 123 124 bus_addr_t addr; 125 bus_size_t size; 126 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 127 aprint_error(": couldn't get registers\n"); 128 return; 129 } 130 if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) { 131 aprint_error(": couldn't map registers\n"); 132 return; 133 } 134 135 struct mpcore_attach_args mpcaa = { 136 .mpcaa_name = "arma9ptmr", 137 .mpcaa_memt = faa->faa_bst, 138 .mpcaa_memh = bsh, 139 .mpcaa_irq = -1, 140 }; 141 142 config_found(self, &mpcaa, NULL, CFARGS_NONE); 143 144 if (is_hardclock) { 145 arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch); 146 arm_fdt_timer_register(a9ptmr_cpu_initclocks); 147 } 148 149 pmf_event_register(self, PMFE_SPEED_CHANGED, a9ptmr_fdt_speed_changed, true); 150 } 151 152 static void 153 a9ptmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci) 154 { 155 a9ptmr_init_cpu_clock(ci); 156 } 157 158 static void 159 a9ptmr_fdt_speed_changed(device_t dev) 160 { 161 struct a9ptmr_fdt_softc * const sc = device_private(dev); 162 prop_dictionary_t dict = device_properties(dev); 163 uint32_t rate; 164 165 rate = clk_get_rate(sc->sc_clk); 166 prop_dictionary_set_uint32(dict, "frequency", rate); 167 168 a9ptmr_update_freq(rate); 169 } 170
Indexes created Mon Sep 22 05:09:51 GMT 2025