| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_kv_dpm.c | 2337 u32 sclk_in_sr = 10000; /* ??? */ local in function:kv_calculate_ds_divider
2347 sclk_in_sr);
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| amdgpu_kv_dpm.c | 2337 u32 sclk_in_sr = 10000; /* ??? */ local in function:kv_calculate_ds_divider
2347 sclk_in_sr);
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| amdgpu_si_dpm.c | 5104 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_populate_ulv_state
5111 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
5666 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_convert_power_state_to_smc
5688 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
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| amdgpu_si_dpm.c | 5104 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_populate_ulv_state
5111 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
5666 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_convert_power_state_to_smc
5688 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_kv_dpm.c | 2272 u32 sclk_in_sr = 10000; /* ??? */ local in function:kv_calculate_ds_divider
2282 sclk_in_sr);
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| radeon_sumo_dpm.c | 1052 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:sumo_patch_thermal_state
1071 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1100 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:sumo_apply_state_adjust_rules
1125 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
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| radeon_trinity_dpm.c | 1408 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:trinity_patch_thermal_state
1427 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1548 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:trinity_apply_state_adjust_rules
1587 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
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| radeon_kv_dpm.c | 2272 u32 sclk_in_sr = 10000; /* ??? */ local in function:kv_calculate_ds_divider
2282 sclk_in_sr);
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| radeon_sumo_dpm.c | 1052 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:sumo_patch_thermal_state
1071 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1100 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:sumo_apply_state_adjust_rules
1125 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
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| radeon_trinity_dpm.c | 1408 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:trinity_patch_thermal_state
1427 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1548 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ local in function:trinity_apply_state_adjust_rules
1587 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
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| radeon_si_dpm.c | 4639 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_populate_ulv_state
4646 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
5202 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_convert_power_state_to_smc
5224 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
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| radeon_si_dpm.c | 4639 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_populate_ulv_state
4646 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
5202 u32 sclk_in_sr = 1350; /* ??? */ local in function:si_convert_power_state_to_smc
5224 if (sclk_in_sr <= SCLK_MIN_DEEPSLEEP_FREQ)
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