/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
dm_services_types.h | 130 uint32_t src_width; member in struct:dm_pp_single_disp_config
|
dm_services_types.h | 130 uint32_t src_width; member in struct:dm_pp_single_disp_config
|
dc_types.h | 487 unsigned int src_width; /* input active width */ member in struct:dc_dwb_cnv_params
|
dc_types.h | 487 unsigned int src_width; /* input active width */ member in struct:dc_dwb_cnv_params
|
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_dce_v10_0.c | 705 u32 src_width; /* viewport width */ member in struct:dce10_wm_params 870 fixed20_12 src_width; local in function:dce_v10_0_average_bandwidth 878 src_width.full = dfixed_const(wm->src_width); 879 bandwidth.full = dfixed_mul(src_width, bpp); 931 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 996 u32 lb_partitions = wm->lb_size / wm->src_width; 1061 wm_high.src_width = mode->crtc_hdisplay; 1100 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v11_0.c | 731 u32 src_width; /* viewport width */ member in struct:dce10_wm_params 896 fixed20_12 src_width; local in function:dce_v11_0_average_bandwidth 904 src_width.full = dfixed_const(wm->src_width); 905 bandwidth.full = dfixed_mul(src_width, bpp); 957 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 1022 u32 lb_partitions = wm->lb_size / wm->src_width; 1087 wm_high.src_width = mode->crtc_hdisplay; 1126 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v6_0.c | 503 u32 src_width; /* viewport width */ member in struct:dce6_wm_params 668 fixed20_12 src_width; local in function:dce_v6_0_average_bandwidth 676 src_width.full = dfixed_const(wm->src_width); 677 bandwidth.full = dfixed_mul(src_width, bpp); 729 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 794 u32 lb_partitions = wm->lb_size / wm->src_width; 868 wm_high.src_width = mode->crtc_hdisplay; 895 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v8_0.c | 640 u32 src_width; /* viewport width */ member in struct:dce8_wm_params 805 fixed20_12 src_width; local in function:dce_v8_0_average_bandwidth 813 src_width.full = dfixed_const(wm->src_width); 814 bandwidth.full = dfixed_mul(src_width, bpp); 866 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 931 u32 lb_partitions = wm->lb_size / wm->src_width; 996 wm_high.src_width = mode->crtc_hdisplay; 1035 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v10_0.c | 705 u32 src_width; /* viewport width */ member in struct:dce10_wm_params 870 fixed20_12 src_width; local in function:dce_v10_0_average_bandwidth 878 src_width.full = dfixed_const(wm->src_width); 879 bandwidth.full = dfixed_mul(src_width, bpp); 931 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 996 u32 lb_partitions = wm->lb_size / wm->src_width; 1061 wm_high.src_width = mode->crtc_hdisplay; 1100 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v11_0.c | 731 u32 src_width; /* viewport width */ member in struct:dce10_wm_params 896 fixed20_12 src_width; local in function:dce_v11_0_average_bandwidth 904 src_width.full = dfixed_const(wm->src_width); 905 bandwidth.full = dfixed_mul(src_width, bpp); 957 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 1022 u32 lb_partitions = wm->lb_size / wm->src_width; 1087 wm_high.src_width = mode->crtc_hdisplay; 1126 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v6_0.c | 503 u32 src_width; /* viewport width */ member in struct:dce6_wm_params 668 fixed20_12 src_width; local in function:dce_v6_0_average_bandwidth 676 src_width.full = dfixed_const(wm->src_width); 677 bandwidth.full = dfixed_mul(src_width, bpp); 729 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 794 u32 lb_partitions = wm->lb_size / wm->src_width; 868 wm_high.src_width = mode->crtc_hdisplay; 895 wm_low.src_width = mode->crtc_hdisplay;
|
amdgpu_dce_v8_0.c | 640 u32 src_width; /* viewport width */ member in struct:dce8_wm_params 805 fixed20_12 src_width; local in function:dce_v8_0_average_bandwidth 813 src_width.full = dfixed_const(wm->src_width); 814 bandwidth.full = dfixed_mul(src_width, bpp); 866 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 931 u32 lb_partitions = wm->lb_size / wm->src_width; 996 wm_high.src_width = mode->crtc_hdisplay; 1035 wm_low.src_width = mode->crtc_hdisplay;
|
/src/sys/external/bsd/drm2/dist/drm/radeon/ |
radeon_evergreen.c | 1941 u32 src_width; /* viewport width */ member in struct:evergreen_wm_params 2050 fixed20_12 src_width; local in function:evergreen_average_bandwidth 2058 src_width.full = dfixed_const(wm->src_width); 2059 bandwidth.full = dfixed_mul(src_width, bpp); 2099 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 2133 u32 lb_partitions = wm->lb_size / wm->src_width; 2196 wm_high.src_width = mode->crtc_hdisplay; 2223 wm_low.src_width = mode->crtc_hdisplay;
|
radeon_evergreen.c | 1941 u32 src_width; /* viewport width */ member in struct:evergreen_wm_params 2050 fixed20_12 src_width; local in function:evergreen_average_bandwidth 2058 src_width.full = dfixed_const(wm->src_width); 2059 bandwidth.full = dfixed_mul(src_width, bpp); 2099 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 2133 u32 lb_partitions = wm->lb_size / wm->src_width; 2196 wm_high.src_width = mode->crtc_hdisplay; 2223 wm_low.src_width = mode->crtc_hdisplay;
|
radeon_si.c | 2069 u32 src_width; /* viewport width */ member in struct:dce6_wm_params 2195 fixed20_12 src_width; local in function:dce6_average_bandwidth 2203 src_width.full = dfixed_const(wm->src_width); 2204 bandwidth.full = dfixed_mul(src_width, bpp); 2247 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 2281 u32 lb_partitions = wm->lb_size / wm->src_width; 2347 wm_high.src_width = mode->crtc_hdisplay; 2374 wm_low.src_width = mode->crtc_hdisplay;
|
radeon_si.c | 2069 u32 src_width; /* viewport width */ member in struct:dce6_wm_params 2195 fixed20_12 src_width; local in function:dce6_average_bandwidth 2203 src_width.full = dfixed_const(wm->src_width); 2204 bandwidth.full = dfixed_mul(src_width, bpp); 2247 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 2281 u32 lb_partitions = wm->lb_size / wm->src_width; 2347 wm_high.src_width = mode->crtc_hdisplay; 2374 wm_low.src_width = mode->crtc_hdisplay;
|
radeon_cik.c | 8986 u32 src_width; /* viewport width */ member in struct:dce8_wm_params 9151 fixed20_12 src_width; local in function:dce8_average_bandwidth 9159 src_width.full = dfixed_const(wm->src_width); 9160 bandwidth.full = dfixed_mul(src_width, bpp); 9212 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 9277 u32 lb_partitions = wm->lb_size / wm->src_width; 9343 wm_high.src_width = mode->crtc_hdisplay; 9383 wm_low.src_width = mode->crtc_hdisplay;
|
radeon_cik.c | 8986 u32 src_width; /* viewport width */ member in struct:dce8_wm_params 9151 fixed20_12 src_width; local in function:dce8_average_bandwidth 9159 src_width.full = dfixed_const(wm->src_width); 9160 bandwidth.full = dfixed_mul(src_width, bpp); 9212 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); 9277 u32 lb_partitions = wm->lb_size / wm->src_width; 9343 wm_high.src_width = mode->crtc_hdisplay; 9383 wm_low.src_width = mode->crtc_hdisplay;
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
dce_calcs.h | 393 struct bw_fixed src_width[maximum_number_of_surfaces]; member in struct:bw_calcs_data
|
dce_calcs.h | 393 struct bw_fixed src_width[maximum_number_of_surfaces]; member in struct:bw_calcs_data
|
/src/sys/external/bsd/drm2/dist/include/uapi/drm/ |
i915_drm.h | 1448 __u16 src_width; member in struct:drm_intel_overlay_put_image
|
i915_drm.h | 1448 __u16 src_width; member in struct:drm_intel_overlay_put_image
|