/src/sys/arch/arm/footbridge/ |
footbridge_clock.c | 206 unsigned int timer_count; local in function:load_timer 209 timer_count = dc21285_fclk / herz; 210 if (timer_count > TIMER_MAX_VAL * 16) { 212 timer_count >>= 8; 213 } else if (timer_count > TIMER_MAX_VAL) { 215 timer_count >>= 4; 221 base + TIMER_LOAD, timer_count); 226 return timer_count;
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footbridge_clock.c | 206 unsigned int timer_count; local in function:load_timer 209 timer_count = dc21285_fclk / herz; 210 if (timer_count > TIMER_MAX_VAL * 16) { 212 timer_count >>= 8; 213 } else if (timer_count > TIMER_MAX_VAL) { 215 timer_count >>= 4; 221 base + TIMER_LOAD, timer_count); 226 return timer_count;
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footbridge_clock.c | 206 unsigned int timer_count; local in function:load_timer 209 timer_count = dc21285_fclk / herz; 210 if (timer_count > TIMER_MAX_VAL * 16) { 212 timer_count >>= 8; 213 } else if (timer_count > TIMER_MAX_VAL) { 215 timer_count >>= 4; 221 base + TIMER_LOAD, timer_count); 226 return timer_count;
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/src/sys/arch/mips/cavium/dev/ |
octeon_gmx.c | 1011 uint64_t ctl_reg, status, timer_count; local in function:octgmx_sgmii_enable 1024 timer_count = PCS_READ_8(sc, PCS_LINK_TIMER_COUNT); 1025 CLR(timer_count, PCS_LINK_TIMER_COUNT_MASK); 1026 SET(timer_count, 1028 PCS_WRITE_8(sc, PCS_LINK_TIMER_COUNT, timer_count);
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octeon_gmx.c | 1011 uint64_t ctl_reg, status, timer_count; local in function:octgmx_sgmii_enable 1024 timer_count = PCS_READ_8(sc, PCS_LINK_TIMER_COUNT); 1025 CLR(timer_count, PCS_LINK_TIMER_COUNT_MASK); 1026 SET(timer_count, 1028 PCS_WRITE_8(sc, PCS_LINK_TIMER_COUNT, timer_count);
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octeon_gmx.c | 1011 uint64_t ctl_reg, status, timer_count; local in function:octgmx_sgmii_enable 1024 timer_count = PCS_READ_8(sc, PCS_LINK_TIMER_COUNT); 1025 CLR(timer_count, PCS_LINK_TIMER_COUNT_MASK); 1026 SET(timer_count, 1028 PCS_WRITE_8(sc, PCS_LINK_TIMER_COUNT, timer_count);
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