Searched refs:CLK_VPP1_SVPP3_VPP_MERGE (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h467 #define CLK_VPP1_SVPP3_VPP_MERGE 25 macro
H A Dmt8195-clk.h568 #define CLK_VPP1_SVPP3_VPP_MERGE 22 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2472 clocks = <&vppsys1 CLK_VPP1_SVPP3_VPP_MERGE>;

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