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    Searched refs:BECC_CSR_WRITE (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/arch/arm/xscale/
becc_csrvar.h 51 #define BECC_CSR_WRITE(x, v) *(volatile uint32_t *)(becc_vaddr + (x)) = (v)
becc_timer.c 106 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
107 BECC_CSR_WRITE(BECC_TSCRB, TSCRx_TIF);
110 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
113 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
160 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
165 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
168 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
258 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM | TSCRx_TIF);
becc.c 123 BECC_CSR_WRITE(BECC_PSTR0, sc->sc_iwin[0].iwin_xlate & PSTRx_ADDRMASK);
129 BECC_CSR_WRITE(BECC_PSTR1, sc->sc_iwin[1].iwin_xlate & PSTRx_ADDRMASK);
139 BECC_CSR_WRITE(BECC_PSTR2,
153 BECC_CSR_WRITE(BECC_POMR1, sc->sc_owin_xlate[0] /* | POMRx_F32 */);
154 BECC_CSR_WRITE(BECC_POMR2, sc->sc_owin_xlate[1] /* | POMRx_F32 */);
157 BECC_CSR_WRITE(BECC_POMR3,
165 BECC_CSR_WRITE(BECC_POIR, sc->sc_ioout_xlate);
170 BECC_CSR_WRITE(BECC_POCR, 0);
becc_intr.h 58 BECC_CSR_WRITE(BECC_ICMR, ~intr_enabled & ICU_VALID_MASK);
becc_pci.c 226 BECC_CSR_WRITE(BECC_POCR, 0);
247 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d);
259 BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210);
291 BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
322 BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
becc_icu.c 141 BECC_CSR_WRITE(BECC_ICSTR, intr_steer & ICU_VALID_MASK);

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