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    Searched refs:CP_ME_CNTL__CE_HALT_MASK (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v7_0.c 2447 WREG32(mmCP_ME_CNTL, (CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK));
4673 WREG32(mmCP_ME_CNTL, CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK);
amdgpu_gfx_v6_0.c 1964 CP_ME_CNTL__CE_HALT_MASK));
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_sh_mask.h 2562 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L
gfx_7_2_sh_mask.h 3047 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000
gfx_8_0_sh_mask.h 3661 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000
    [all...]
gfx_8_1_sh_mask.h 4183 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_sh_mask.h 1175 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L
    [all...]
gc_9_1_sh_mask.h 1074 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L
    [all...]
gc_9_2_1_sh_mask.h 1041 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L
    [all...]
gc_10_1_0_sh_mask.h 6659 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L
    [all...]

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