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    Searched refs:HDMI_ACR_AUTO_SEND (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen_hdmi.c 86 HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
90 HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
rv770d.h 704 # define HDMI_ACR_AUTO_SEND (1 << 12)
evergreend.h 549 # define HDMI_ACR_AUTO_SEND (1 << 12)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 180 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\
260 SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\
456 uint8_t HDMI_ACR_AUTO_SEND;
587 uint32_t HDMI_ACR_AUTO_SEND;
amdgpu_dce_stream_encoder.c 1390 HDMI_ACR_AUTO_SEND, 1,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 230 SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\
420 type HDMI_ACR_AUTO_SEND;\
amdgpu_dcn10_stream_encoder.c 1322 HDMI_ACR_AUTO_SEND, 1,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1684 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1);
amdgpu_dce_v11_0.c 1726 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1);
amdgpu_dce_v6_0.c 1423 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1);

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