| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| avivod.h | 61 #define VGA_RENDER_CONTROL 0x0300
|
| radeon_evergreen.c | 2676 save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
2680 WREG32(VGA_RENDER_CONTROL, 0);
2851 WREG32(VGA_RENDER_CONTROL, save->vga_render_control);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_si.c | 1134 u32 vga_render_control = 0; local in function:si_read_disabled_bios
1142 vga_render_control = RREG32(VGA_RENDER_CONTROL);
1156 WREG32(VGA_RENDER_CONTROL,
1157 (vga_render_control & C_000300_VGA_VSTATUS_CNTL));
1168 WREG32(VGA_RENDER_CONTROL, vga_render_control);
|
| sid.h | 2010 #define VGA_RENDER_CONTROL 0xC0
2351 #define VGA_RENDER_CONTROL 0xC0
|
| amdgpu_gmc_v7_0.c | 291 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
| amdgpu_gmc_v9_0.c | 1340 WREG32_FIELD15(DCE, 0, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
| amdgpu_gmc_v8_0.c | 482 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
| amdgpu_dce_v10_0.c | 464 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
466 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
| amdgpu_dce_v11_0.c | 480 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
482 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
| amdgpu_dce_v8_0.c | 397 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
399 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
|
