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  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_clocks.c 190 struct radeon_pll *dcpll = &rdev->clock.dcpll; local in function:radeon_get_clock_info
304 /* dcpll is DCE4 only */
305 dcpll->min_post_div = 2;
306 dcpll->max_post_div = 0x7f;
307 dcpll->min_frac_feedback_div = 0;
308 dcpll->max_frac_feedback_div = 9;
309 dcpll->min_ref_div = 2;
310 dcpll->max_ref_div = 0x3ff;
311 dcpll->min_feedback_div = 4
    [all...]
radeon_atombios.c 1142 struct radeon_pll *dcpll = &rdev->clock.dcpll; local in function:radeon_atom_get_clock_info
1274 *dcpll = *p1pll;
radeon_atombios_crtc.c 797 /* if the default dcpll clock is specified,
805 /* if the default dcpll clock is specified,
1097 pll = &rdev->clock.dcpll;
1876 * - DCPLL is available to all UNIPHY (DP only)
1981 /* in DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
1984 * DCE5: PPLL, DCPLL, or ext clock
1988 * PPLL/DCPLL programming and only program the DP DTO for the
1999 /* use DCPLL for all DP */
2043 /* always set DCPLL */
radeon.h 282 struct radeon_pll dcpll; member in struct:radeon_clock

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