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  /src/sys/arch/mips/cavium/
octeon_dma.c 50 octeon_dma_init(struct octeon_config *mcp)
55 t = &mcp->mc_iobus_dmat;
56 t->_cookie = mcp;
65 mcp->mc_bootbus_dmat = mcp->mc_iobus_dmat;
66 mcp->mc_core1_dmat = mcp->mc_iobus_dmat;
67 mcp->mc_fpa_dmat = mcp->mc_iobus_dmat;
70 mcp->mc_fpa_dmat._bounce_alloc_hi = round_page(MIPS_PHYS_MASK)
    [all...]
octeon_bootbus.c 57 bootbus_bootstrap(struct octeon_config *mcp)
60 bootbus_bus_io_init(&mcp->mc_bootbus_bust, mcp);
62 bootbus_bust = &mcp->mc_bootbus_bust;
63 bootbus_dmat = &mcp->mc_bootbus_dmat;
octeon_iobus.c 68 iobus_bootstrap(struct octeon_config *mcp)
70 iobus_bus_io_init(&mcp->mc_iobus_bust, mcp);
72 iobus_bust = &mcp->mc_iobus_bust;
73 iobus_dmat = &mcp->mc_iobus_dmat;
  /src/lib/libc/arch/m68k/gen/
makecontext.c 47 mcontext_t *mcp = &ucp->uc_mcontext; local in function:makecontext
51 mcp->__gregs[_REG_PC] = (__greg_t)func;
56 mcp->__gregs[_REG_A7] = (__greg_t)sp;
57 mcp->__gregs[_REG_A6] = 0; /* Wipe out frame pointer. */
  /src/sys/arch/arm/arm32/
netbsd32_machdep.c 76 cpu_mcontext32_validate(struct lwp *l, const mcontext32_t *mcp)
78 return cpu_mcontext_validate(l, mcp);
81 cpu_getmcontext32(struct lwp *l, mcontext32_t *mcp, unsigned int *flagsp)
83 cpu_getmcontext(l, mcp, flagsp);
87 cpu_setmcontext32(struct lwp *l, const mcontext32_t *mcp, unsigned int flags)
89 return cpu_setmcontext(l, mcp, flags);
  /src/sys/arch/riscv/riscv/
netbsd32_machdep.c 81 cpu_getmcontext32(struct lwp *l, mcontext32_t *mcp, unsigned int *flags)
87 mcp->__gregs[i] = tf->tf_reg[i];
89 mcp->__gregs[_REG_PC] = tf->tf_pc;
91 mcp->__private = (intptr_t)l->l_private;
105 *(struct fpreg *)mcp->__fregs = pcb->pcb_fpregs;
111 cpu_mcontext32_validate(struct lwp *l, const mcontext32_t *mcp)
116 if ((int32_t) mcp->__gregs[_REG_PC] < 0
117 || (int32_t) mcp->__gregs[_REG_SP] < 0
118 || (mcp->__gregs[_REG_PC] & 1))
125 cpu_setmcontext32(struct lwp *l, const mcontext32_t *mcp, unsigned int flags
    [all...]
  /src/sys/arch/evbmips/mipssim/
mipssim_dma.c 51 mipssim_dma_init(struct mipssim_config *mcp)
55 t = &mcp->mc_dmat;
56 t->_cookie = mcp;
mainbus.c 81 struct mipssim_config *mcp = &mipssim_configuration; local in function:mainbus_attach
92 maa.ma_iot = &mcp->mc_iot;
93 maa.ma_dmat = &mcp->mc_dmat;
102 maa.ma_iot = &mcp->mc_iot;
103 maa.ma_dmat = &mcp->mc_dmat;
  /src/sys/arch/evbmips/malta/
machdep.c 148 struct malta_config *mcp = &malta_configuration; local in function:mach_init
193 gt_pci_init(&mcp->mc_pc, &mcp->mc_gt);
194 malta_bus_io_init(&mcp->mc_iot, mcp);
195 malta_bus_mem_init(&mcp->mc_memt, mcp);
196 malta_dma_init(mcp);
202 bus_space_map(&mcp->mc_iot, MALTA_RTCADR, 2, 0, &sh);
203 malta_cal_timer(&mcp->mc_iot, sh)
    [all...]
malta_intr.c 113 struct malta_config * const mcp = &malta_configuration; local in function:evbmips_intr_init
123 mcp->mc_pc.pc_intr_v = NULL;
124 mcp->mc_pc.pc_intr_map = malta_pci_intr_map;
125 mcp->mc_pc.pc_intr_string = malta_pci_intr_string;
126 mcp->mc_pc.pc_intr_evcnt = malta_pci_intr_evcnt;
127 mcp->mc_pc.pc_intr_establish = malta_pci_intr_establish;
128 mcp->mc_pc.pc_intr_disestablish = malta_pci_intr_disestablish;
129 mcp->mc_pc.pc_conf_interrupt = malta_pci_conf_interrupt;
130 mcp->mc_pc.pc_pciide_compat_intr_establish =
  /src/sys/arch/powerpc/powerpc/
sig_machdep.c 174 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flagp)
177 __greg_t * const gr = mcp->__gregs;
204 if (!fpu_save_to_mcontext(l, mcp, flagp))
206 memset(&mcp->__fpregs, 0, sizeof(mcp->__fpregs));
210 if (!vec_save_to_mcontext(l, mcp, flagp))
212 memset(&mcp->__vrf, 0, sizeof (mcp->__vrf));
216 cpu_mcontext_validate(struct lwp *l, const mcontext_t *mcp)
222 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags
    [all...]
fpu.c 216 fpu_save_to_mcontext(lwp_t *l, mcontext_t *mcp, unsigned int *flagp)
229 (void)memcpy(mcp->__fpregs.__fpu_regs, pcb->pcb_fpu.fpreg,
230 sizeof (mcp->__fpregs.__fpu_regs));
231 mcp->__fpregs.__fpu_fpscr =
233 mcp->__fpregs.__fpu_valid = 1;
239 fpu_restore_from_mcontext(lwp_t *l, const mcontext_t *mcp)
241 if (!mcp->__fpregs.__fpu_valid)
250 (void)memcpy(&pcb->pcb_fpu.fpreg, &mcp->__fpregs.__fpu_regs,
252 ((int *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] = mcp->__fpregs.__fpu_fpscr;
  /src/sys/arch/m68k/m68k/
sig_machdep.c 196 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, u_int *flags)
198 __greg_t *gr = mcp->__gregs;
229 mcp->_mc_tlsbase = (uintptr_t)l->l_private;
233 mcp->__mc_pad.__mc_frame.__mcf_format = format;
235 mcp->__mc_pad.__mc_frame.__mcf_vector = frame->f_vector;
236 (void)memcpy(&mcp->__mc_pad.__mc_frame.__mcf_exframe,
266 mcp->__mc_pad.__mc_frame.__mcf_fpf_u1 = fpf->FPF_u1;
270 mcp->__mc_pad.__mc_frame.__mcf_fpf_u2 = fpf->FPF_u2;
271 (void)memcpy(mcp->__fpregs.__fp_fpregs,
273 mcp->__fpregs.__fp_pcr = fpf->fpf_fpcr
    [all...]
  /src/sys/arch/arm/arm/
sig_machdep.c 160 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flags)
163 __greg_t * const gr = mcp->__gregs;
194 vfp_getcontext(l, mcp, flags);
197 mcp->_mc_tlsbase = (uintptr_t)l->l_private;
201 mcp->_mc_user_tpid = pcb->pcb_user_pid_rw;
205 cpu_mcontext_validate(struct lwp *l, const mcontext_t *mcp)
207 const __greg_t * const gr = mcp->__gregs;
216 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)
219 const __greg_t * const gr = mcp->__gregs;
231 error = cpu_mcontext_validate(l, mcp);
    [all...]
  /src/sys/arch/mips/cavium/dev/
octeon_pci.c 54 octpci_bootstrap(struct octeon_config *mcp)
octeon_pow.c 55 octpow_bootstrap(struct octeon_config *mcp)
59 sc->sc_regt = &mcp->mc_iobus_bust;
  /src/sys/arch/powerpc/oea/
altivec.c 160 vec_restore_from_mcontext(struct lwp *l, const mcontext_t *mcp)
173 if (mcp != NULL) { /* XXX see compat_16_sys___sigreturn14() */
174 memcpy(pcb->pcb_vr.vreg, &mcp->__vrf.__vrs,
176 pcb->pcb_vr.vscr = mcp->__vrf.__vscr;
177 pcb->pcb_vr.vrsave = mcp->__vrf.__vrsave;
183 vec_save_to_mcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flagp)
198 if (mcp != NULL) { /* XXX see sendsig_sigcontext() */
199 mcp->__gregs[_REG_MSR] |= PSL_VEC;
200 mcp->__vrf.__vscr = pcb->pcb_vr.vscr;
201 mcp->__vrf.__vrsave = l->l_md.md_utf->tf_vrsave
    [all...]
  /src/sys/arch/powerpc/booke/
spe.c 149 vec_restore_from_mcontext(lwp_t *l, const mcontext_t *mcp)
152 const union __vr *vr = mcp->__vrf.__vrs;
169 l->l_md.md_utf->tf_spefscr = pcb->pcb_vr.vscr = mcp->__vrf.__vscr;
170 pcb->pcb_vr.vrsave = mcp->__vrf.__vrsave;
174 vec_save_to_mcontext(lwp_t *l, mcontext_t *mcp, unsigned int *flagp)
183 mcp->__gregs[_REG_MSR] |= PSL_SPV;
185 union __vr *vr = mcp->__vrf.__vrs;
206 mcp->__vrf.__vrs[0].__vr32[2] = pcb->pcb_vr.vreg[8][0];
207 mcp->__vrf.__vrs[0].__vr32[3] = pcb->pcb_vr.vreg[8][1];
209 mcp->__vrf.__vrsave = pcb->pcb_vr.vrsave
    [all...]
  /src/sys/arch/evbmips/malta/dev/
gt.c 71 gt_pci_init(pci_chipset_tag_t pc, struct gt_config *mcp)
74 pc->pc_conf_v = mcp;
106 struct malta_config *mcp = &malta_configuration; local in function:gt_attach
115 pba.pba_iot = &mcp->mc_iot;
116 pba.pba_memt = &mcp->mc_memt;
117 pba.pba_dmat = &mcp->mc_pci_dmat; /* pci_bus_dma_tag */
119 pba.pba_pc = &mcp->mc_pc;
  /src/sys/arch/aarch64/aarch64/
cpu_machdep.c 162 cpu_mcontext_validate(struct lwp *l, const mcontext_t *mcp)
169 if ((mcp->__gregs[_REG_SPSR] & ~SPSR_NZCV)
170 || (mcp->__gregs[_REG_PC] & 3))
193 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flagsp)
197 memcpy(mcp->__gregs, &tf->tf_regs, sizeof(mcp->__gregs));
198 mcp->__gregs[_REG_TPIDR] = (uintptr_t)l->l_private;
199 mcp->__gregs[_REG_SPSR] &= ~SPSR_A64_BTYPE;
205 mcp->__fregs = *(const __fregset_t *) &pcb->pcb_fpregs;
211 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags
    [all...]
netbsd32_machdep.c 399 cpu_mcontext32_validate(struct lwp *l, const mcontext32_t *mcp)
402 const uint32_t spsr = mcp->__gregs[_REG_CPSR];
423 cpu_getmcontext32(struct lwp *l, mcontext32_t *mcp, unsigned int *flagsp)
426 __greg32_t *gr = mcp->__gregs;
462 mcp->__vfpregs.__vfp_fstmx[j++] =
464 mcp->__vfpregs.__vfp_fstmx[j++] =
467 mcp->__vfpregs.__vfp_fstmx[j++] =
469 mcp->__vfpregs.__vfp_fstmx[j++] =
474 mcp->__vfpregs.__vfp_fpscr =
477 mcp->__vfpregs.__vfp_fpsid = 0; /* XXX: build FPSID from MIDR *
    [all...]
  /src/sys/arch/sparc64/sparc64/
netbsd32_machdep.c 405 /* netbsd32_mcontext_t XXX */mcontext_t *mcp,
410 greg32_t *gr = mcp->__gregs;
421 (void)memset(mcp, 0, sizeof (*mcp));
445 mcp->__gwins = 0;
451 netbsd32_fpregset_t *fpr = &mcp->__fpregs;
462 mcp->__fpregs.__fpu_q = NULL; /* `Need more info.' */
463 mcp->__fpregs.__fpu_fsr = fs.fs_fsr;
464 mcp->__fpregs.__fpu_qcnt = 0 /*fs.fs_qsize*/; /* See above */
465 mcp->__fpregs.__fpu_q_entrysize
    [all...]
  /src/sys/arch/hppa/hppa/
hppa_machdep.c 58 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flags)
62 __greg_t *gr = mcp->__gregs;
128 memcpy(&mcp->__fpregs, pcb->pcb_fpregs, sizeof(mcp->__fpregs));
133 cpu_mcontext_validate(struct lwp *l, const mcontext_t *mcp)
135 const __greg_t *gr = mcp->__gregs;
171 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)
176 const __greg_t *gr = mcp->__gregs;
180 error = cpu_mcontext_validate(l, mcp);
256 memcpy(pcb->pcb_fpregs, &mcp->__fpregs, sizeof(mcp->__fpregs))
    [all...]
  /src/sys/arch/alpha/pci/
mcpcia.c 129 struct mcpcia_softc *mcp = device_private(self); local in function:mcpciaattach
138 mcp->mcpcia_cc = NULL;
156 mcp->mcpcia_dev = self;
157 mcp->mcpcia_cc = ccp;
158 ccp->cc_sc = mcp;
301 struct mcpcia_softc *mcp; local in function:mcpcia_config_cleanup
310 if ((mcp = device_lookup_private(&mcpcia_cd, i)) == NULL)
313 ccp = mcp->mcpcia_cc;
  /src/sys/arch/alpha/alpha/
dec_kn20aa.c 110 struct mchkinfo *mcp; local in function:dec_kn20aa_mcheck
117 mcp = &curcpu()->ci_mcinfo;
118 if (mcp->mc_expected) {

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