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Searched refs:mmCUR_CONTROL (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c	`2311 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); 2313 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); 2327 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); 2330 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);`
amdgpu_dce_v11_0.c	`2390 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); 2392 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); 2406 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); 2409 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);`
amdgpu_dce_v6_0.c	`2202 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, 2219 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,`
amdgpu_dce_v8_0.c	`2213 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, 2228 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`1035 #define mmCUR_CONTROL 0x1A66`
dce_8_0_d.h	`2230 #define mmCUR_CONTROL 0x1a66`
dce_10_0_d.h	`3079 #define mmCUR_CONTROL 0x1a66`
dce_11_0_d.h	`2826 #define mmCUR_CONTROL 0x1a66`
dce_11_2_d.h	`4064 #define mmCUR_CONTROL 0x1a66`

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