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    Searched refs:mmPIPE0_DMIF_BUFFER_CONTROL (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 637 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset);
639 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, tmp);
642 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset);
amdgpu_dce_v11_0.c 663 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset);
665 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, tmp);
668 tmp = RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset);
amdgpu_dce_v6_0.c 1030 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset,
1033 if (RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset) &
amdgpu_dce_v8_0.c 574 WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset,
577 if (RREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset) &
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 4022 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x0328
dce_8_0_d.h 1231 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x328
dce_10_0_d.h 1527 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321
dce_11_0_d.h 1348 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321
dce_11_2_d.h 1428 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x321
dce_12_0_offset.h 1046 #define mmPIPE0_DMIF_BUFFER_CONTROL 0x00ef
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