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    Searched refs:mmRLC_PG_CNTL (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v7_0.c 3729 orig = data = RREG32(mmRLC_PG_CNTL);
3735 WREG32(mmRLC_PG_CNTL, data);
3743 orig = data = RREG32(mmRLC_PG_CNTL);
3749 WREG32(mmRLC_PG_CNTL, data);
3756 orig = data = RREG32(mmRLC_PG_CNTL);
3762 WREG32(mmRLC_PG_CNTL, data);
3769 orig = data = RREG32(mmRLC_PG_CNTL);
3775 WREG32(mmRLC_PG_CNTL, data);
3792 orig = data = RREG32(mmRLC_PG_CNTL);
3795 WREG32(mmRLC_PG_CNTL, data)
    [all...]
amdgpu_gfx_v9_0.c 2804 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2809 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
2818 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2823 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
2832 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2837 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
2845 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2850 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
2858 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2863 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data)
    [all...]
amdgpu_gfx_v6_0.c 2695 orig = data = RREG32(mmRLC_PG_CNTL);
2701 WREG32(mmRLC_PG_CNTL, data);
2805 orig = data = RREG32(mmRLC_PG_CNTL);
2811 WREG32(mmRLC_PG_CNTL, data);
2819 orig = data = RREG32(mmRLC_PG_CNTL);
2825 WREG32(mmRLC_PG_CNTL, data);
amdgpu_gfx_v10_0.c 1823 rlc_pg_cntl = RREG32_SOC15(GC, 0, mmRLC_PG_CNTL);
1837 WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, rlc_pg_cntl);
1911 WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 1167 #define mmRLC_PG_CNTL 0x30D7
gfx_7_0_d.h 1277 #define mmRLC_PG_CNTL 0x3103
gfx_7_2_d.h 1290 #define mmRLC_PG_CNTL 0x3103
gfx_8_0_d.h 1388 #define mmRLC_PG_CNTL 0xec43
gfx_8_1_d.h 1390 #define mmRLC_PG_CNTL 0xec43
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6034 #define mmRLC_PG_CNTL 0x4c43
gc_9_1_offset.h 6256 #define mmRLC_PG_CNTL 0x4c43
gc_9_2_1_offset.h 6232 #define mmRLC_PG_CNTL 0x4c43
gc_10_1_0_offset.h 9356 #define mmRLC_PG_CNTL 0x4c43
    [all...]

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