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Searched refs:mmSDMA0_GFX_IB_RPTR (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h	`228 #define mmSDMA0_GFX_IB_RPTR 0x008b`
sdma0_4_0_offset.h	`232 #define mmSDMA0_GFX_IB_RPTR 0x008b`
sdma0_4_2_2_offset.h	`232 #define mmSDMA0_GFX_IB_RPTR 0x008b`
sdma0_4_2_offset.h	`228 #define mmSDMA0_GFX_IB_RPTR 0x008b`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h	`200 #define mmSDMA0_GFX_IB_RPTR 0x348b`
oss_2_0_d.h	`259 #define mmSDMA0_GFX_IB_RPTR 0x348b`
oss_3_0_1_d.h	`227 #define mmSDMA0_GFX_IB_RPTR 0x348b`
oss_3_0_d.h	`352 #define mmSDMA0_GFX_IB_RPTR 0x348b`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v2_4.c	`457 WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);`
amdgpu_cik_sdma.c	`478 WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);`
amdgpu_sdma_v3_0.c	`696 WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`223 #define mmSDMA0_GFX_IB_RPTR 0x008b [all...]`

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