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    Searched refs:mmVML2VC0_VM_CONTEXT0_CNTL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mmhub_v9_4.c 272 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL,
278 WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL,
410 mmVML2VC0_VM_CONTEXT0_CNTL,
532 mmVML2VC0_VM_CONTEXT0_CNTL) +
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_9_4_1_offset.h 3960 #define mmVML2VC0_VM_CONTEXT0_CNTL 0x0a00

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