| /src/sys/arch/arm/rockchip/ |
| rk3328_cru.c | 151 static const char * mux_2plls_parents[] = { "cpll", "gpll" }; variable in typeref:typename:const char * []
221 RK_COMPOSITE(RK3328_SCLK_SPI, "clk_spi", mux_2plls_parents,
228 RK_COMPOSITE(RK3328_SCLK_PWM, "clk_pwm", mux_2plls_parents,
311 RK_COMPOSITE(RK3328_SCLK_MAC2IO_SRC, "clk_mac2io_src", mux_2plls_parents,
318 RK_COMPOSITE(RK3328_SCLK_MAC2IO_OUT, "clk_mac2io_out", mux_2plls_parents,
325 RK_COMPOSITE(RK3328_SCLK_I2C0, "clk_i2c0", mux_2plls_parents,
332 RK_COMPOSITE(RK3328_SCLK_I2C1, "clk_i2c1", mux_2plls_parents,
339 RK_COMPOSITE(RK3328_SCLK_I2C2, "clk_i2c2", mux_2plls_parents,
346 RK_COMPOSITE(RK3328_SCLK_I2C3, "clk_i2c3", mux_2plls_parents,
360 RK_COMPOSITE(RK3328_SCLK_CRYPTO, "clk_crypto", mux_2plls_parents,
[all...] |
| rk3288_cru.c | 72 static const char * mux_2plls_parents[] = { "cpll", "gpll" }; variable in typeref:typename:const char * []
123 RK_COMPOSITE(0, "aclk_peri_src", mux_2plls_parents,
244 RK_COMPOSITE(RK3288_SCLK_SPI0, "sclk_spi0", mux_2plls_parents,
251 RK_COMPOSITE(RK3288_SCLK_SPI1, "sclk_spi1", mux_2plls_parents,
258 RK_COMPOSITE(RK3288_SCLK_SPI2, "sclk_spi2", mux_2plls_parents,
283 RK_MUX(0, "uart_src", mux_2plls_parents, CLKSEL_CON(15), __BIT(15)),
|
