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    Searched refs:vdd_dep_on_mclk (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_process_pptables_v1_0.c 800 pp_table_information->vdd_dep_on_mclk = NULL;
819 &pp_table_information->vdd_dep_on_mclk, mclk_dep_table);
838 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_mclk)
839 && (0 != pp_table_information->vdd_dep_on_mclk->count))
841 pp_table_information->vdd_dep_on_mclk);
1122 kfree(pp_table_information->vdd_dep_on_mclk);
1123 pp_table_information->vdd_dep_on_mclk = NULL;
amdgpu_vega10_processpptables.c 962 pp_table_info->vdd_dep_on_mclk = NULL;
1015 &pp_table_info->vdd_dep_on_mclk,
1059 pp_table_info->vdd_dep_on_mclk &&
1060 pp_table_info->vdd_dep_on_mclk->count)
1063 pp_table_info->vdd_dep_on_mclk);
1244 kfree(pp_table_info->vdd_dep_on_mclk);
1245 pp_table_info->vdd_dep_on_mclk = NULL;
amdgpu_vega10_hwmgr.c 337 dep_table[1] = table_info->vdd_dep_on_mclk;
340 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk;
675 table_info->vdd_dep_on_mclk;
780 table_info->vdd_dep_on_mclk;
1174 table_info->vdd_dep_on_mclk,
1183 table_info->vdd_dep_on_mclk,
1314 table_info->vdd_dep_on_mclk;
1776 &data->odn_dpm_table.vdd_dep_on_mclk;
1778 dep_on_mclk = table_info->vdd_dep_on_mclk;
2476 dep_table = table_info->vdd_dep_on_mclk;
    [all...]
smu10_hwmgr.h 204 struct smu10_voltage_dependency_table *vdd_dep_on_mclk; member in struct:smu10_clock_voltage_information
vega10_hwmgr.h 298 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_mclk; member in struct:vega10_odn_dpm_table
amdgpu_smu10_hwmgr.c 467 smu10_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_mclk,
1008 pclk_vol_table = pinfo->vdd_dep_on_mclk;
1064 pclk_vol_table = pinfo->vdd_dep_on_mclk;
amdgpu_smu7_hwmgr.c 277 table_info->vdd_dep_on_mclk);
297 table_info->vdd_dep_on_mclk);
777 dep_mclk_table = table_info->vdd_dep_on_mclk;
844 dep_mclk_table = table_info->vdd_dep_on_mclk;
931 dep_table = table_info->vdd_dep_on_mclk;
1863 table_info->vdd_dep_on_mclk;
1942 phm_ppt_v1_clock_voltage_dependency_table *mclk_table = pptable_info->vdd_dep_on_mclk;
2085 table_info->vdd_dep_on_mclk;
2129 dep_mclk_table = table_info->vdd_dep_on_mclk;
3232 table_info->vdd_dep_on_mclk;
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_vegam_smumgr.c 993 if (table_info->vdd_dep_on_mclk) {
995 table_info->vdd_dep_on_mclk, clock,
1097 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {
1098 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {
1103 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,
1167 table_info->vdd_dep_on_mclk,
1421 count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
1423 if (table_info->vdd_dep_on_mclk->entries[level].clk >=
amdgpu_fiji_smumgr.c 1181 vdd_dep_table = table_info->vdd_dep_on_mclk;
1288 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {
1289 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {
1294 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,
1383 table_info->vdd_dep_on_mclk,
1656 count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
1658 if (table_info->vdd_dep_on_mclk->entries[level].clk >=
amdgpu_polaris10_smumgr.c 1090 vdd_dep_table = table_info->vdd_dep_on_mclk;
1189 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {
1190 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {
1195 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,
1256 table_info->vdd_dep_on_mclk,
1504 count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
1506 if (table_info->vdd_dep_on_mclk->entries[level].clk >=
amdgpu_tonga_smumgr.c 985 vdd_dep_table = pptable_info->vdd_dep_on_mclk;
1158 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {
1159 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {
1167 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
hwmgr.h 530 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member in struct:phm_ppt_v1_information
559 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member in struct:phm_ppt_v2_information

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