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  /src/sys/arch/hpcmips/tx/
tx39timerreg.h 37 #define TX39_TIMERALARMHI_REG 0x148
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 161 #define CM_BURSTCTL 0x148
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 124 #define PCI_ABITOR_STATUS 0x148
  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 114 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_REG 0x148
tegra210_pinmux.c 143 TEGRA_PIN("dap4_din_pj5", 0x148, "i2s4b", "rsvd1", "rsvd2", "rsvd3"),
  /src/sys/dev/pci/
if_nfereg.h 68 #define NFE_TX_RING_ADDR_HI 0x148
cs4281reg.h 104 #define CS4281_DBA3 0x148 /* DMA Engine 3 Base Address Register */
if_stgereg.h 450 #define STGE_EtherStatsPkts256to511Octets 0x148
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
omap4.h 124 #define OMAP4_UART2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x148)
omap5.h 86 #define OMAP5_UART2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x148)
dra7.h 160 #define DRA7_L4PER_UART2_CLKCTRL DRA7_L4PER_CLKCTRL_INDEX(0x148)
  /src/lib/libcurses/
keyname.c 142 if (key < 0x148) {
151 if (key == 0x148) {
  /src/tests/lib/libcurses/tests/
std_defines 55 assign KEY_DL 0x148
  /src/sys/arch/amiga/amiga/
cc_registers.h 190 #define R_SPR1_POS 0x148
  /src/sys/arch/arm/footbridge/
dc21285reg.h 228 #define XBUS_CYCLE_ARBITER 0x148
  /src/sys/arch/arm/s3c2xx0/
s3c2800reg.h 314 #define PCICTL_PCIBATPA1 0x148 /* address translation PCI to AHB BAR1 */
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
ppsmc.h 138 #define PPSMC_MSG_PCIeDPM_UnForceLevel ((uint16_t) 0x148)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
ppsmc.h 135 #define PPSMC_MSG_PCIeDPM_UnForceLevel ((uint16_t) 0x148)
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 210 0x148 MODE_NITRO /* i2s_spdif_out */
  /src/sys/arch/arm/imx/
imx23_digctlreg.h 265 #define HW_DIGCTL_OCRAM_STATUS3_CLR 0x148
  /src/sys/arch/arm/ti/
omap4_prcm.c 188 OMAP4_PRCM_HWMOD_CM2_L4PER("uart2", 0x148, "PERIPH_CLK"),
  /src/sys/arch/x86/pci/
tcpcib.c 80 #define E600_HPET_T2CV 0x148 /* Timer 2 Comparator Value */
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/
imxrt1050-pinfunc.h 633 #define MXRT1050_IOMUXC_GPIO_B0_03_LCD_VSYNC 0x148 0x338 0x000 0x0 0x0
634 #define MXRT1050_IOMUXC_GPIO_B0_03_TMR2_TIMER0 0x148 0x338 0x56C 0x1 0x1
635 #define MXRT1050_IOMUXC_GPIO_B0_03_FLEXCAN1_RX 0x148 0x338 0x44C 0x2 0x3
636 #define MXRT1050_IOMUXC_GPIO_B0_03_LPSPI4_SCK 0x148 0x338 0x520 0x3 0x0
637 #define MXRT1050_IOMUXC_GPIO_B0_03_FLEXIO2_D03 0x148 0x338 0x000 0x4 0x0
638 #define MXRT1050_IOMUXC_GPIO_B0_03_GPIO2_IO03 0x148 0x338 0x000 0x5 0x0
639 #define MXRT1050_IOMUXC_GPIO_B0_03_WDOG2_RESET_B_DEB 0x148 0x338 0x000 0x6 0x0
imx51-pinfunc.h 264 #define MX51_PAD_NANDF_CS6__CSPI_SS3 0x148 0x530 0x928 0x7 0x0
265 #define MX51_PAD_NANDF_CS6__FEC_TDATA3 0x148 0x530 0x000 0x2 0x0
266 #define MX51_PAD_NANDF_CS6__GPIO3_22 0x148 0x530 0x000 0x3 0x0
267 #define MX51_PAD_NANDF_CS6__NANDF_CS6 0x148 0x530 0x000 0x0 0x0
268 #define MX51_PAD_NANDF_CS6__PATA_DA_2 0x148 0x530 0x000 0x1 0x0
269 #define MX51_PAD_NANDF_CS6__SD4_DAT3 0x148 0x530 0x000 0x5 0x0
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/vf/
vf610-pinfunc.h 530 #define VF610_PAD_PTD3__GPIO_82 0x148 0x000 ALT0 0x0
531 #define VF610_PAD_PTD3__QSPI0_A_DATA2 0x148 0x000 ALT1 0x0
532 #define VF610_PAD_PTD3__UART2_CTS 0x148 0x384 ALT2 0x1
533 #define VF610_PAD_PTD3__DSPI1_CS2 0x148 0x000 ALT3 0x0
534 #define VF610_PAD_PTD3__FB_AD12 0x148 0x000 ALT4 0x0
535 #define VF610_PAD_PTD3__SPDIF_PLOCK 0x148 0x000 ALT5 0x0
536 #define VF610_PAD_PTD3__DEBUG_OUT20 0x148 0x000 ALT7 0x0

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