Searched refs:compacted (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_eu.cpp482 brw_compact_inst *compacted = (brw_compact_inst *)inst; local in function:brw_label_assembly
483 brw_uncompact_instruction(devinfo, &uncompacted, compacted);
545 bool compacted = brw_inst_cmpt_control(devinfo, insn); local in function:brw_disassemble
549 if (compacted) {
550 brw_compact_inst *compacted = (brw_compact_inst *)insn; local in function:brw_disassemble
561 /* Make compacted instructions hex value output vertically aligned
567 brw_uncompact_instruction(devinfo, &uncompacted, compacted);
582 brw_disassemble_inst(out, devinfo, insn, compacted, offset, root_label);
584 if (compacted) {
H A Dbrw_eu_compact.c50 * 8-byte compacted instructions, allowing jump targets to be only 8-byte
60 * control flow instructions with UIP cannot be compacted, because of the
61 * replicated 13th bit. No control flow instructions can be compacted on Gfx6
74 * Gfx12 reduces the number of bits that available to compacted immediates from
1235 /* src1 index takes the low 4 bits of the 12-bit compacted value */
1238 /* src1 index takes the high 5 bits of the 13-bit compacted value */
1449 * compacted instruction. The instruction cannot be compacted if any of
1478 * fields of the compacted instruction. All of them seem to be reserved
1555 /* On SNB through ICL, compacted instruction
1993 uint32_t compacted = brw_compact_inst_src0_index(devinfo, src); local in function:set_uncompacted_src0
2034 uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src); local in function:set_uncompacted_3src_control_index
2057 uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src); local in function:set_uncompacted_3src_control_index
2079 uint32_t compacted = brw_compact_inst_3src_control_index(devinfo, src); local in function:set_uncompacted_3src_control_index
2096 uint32_t compacted = brw_compact_inst_3src_source_index(devinfo, src); local in function:set_uncompacted_3src_source_index
2145 uint32_t compacted = brw_compact_inst_3src_subreg_index(devinfo, src); local in function:set_uncompacted_3src_subreg_index
[all...]
H A Dbrw_eu_validate.c2155 brw_compact_inst *compacted = (void *)inst; local in function:brw_validate_instructions
2156 brw_uncompact_instruction(devinfo, &uncompacted, compacted);
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_nir_lower_multiview.c82 /* We use instancing for implementing multiview. The compacted view
86 nir_ssa_def *compacted = local in function:build_view_index
91 /* If we have a full view mask, then compacted is what we want */
92 state->view_index = compacted;
94 /* Now we define a map from compacted view index to the actual
105 nir_ssa_def *shift = nir_imul(b, compacted, nir_imm_int(b, 4));
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Di965_asm.c54 " --compact print compacted instructions\n"
344 bool compacted = false; local in function:main
348 compacted = true;
353 print_instruction(output, compacted, insn);
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_nir_lower_multiview.c87 /* We use instancing for implementing multiview. The compacted view
91 nir_ssa_def *compacted = local in function:build_view_index
96 /* If we have a full view mask, then compacted is what we want */
97 state->view_index = compacted;
99 /* Now we define a map from compacted view index to the actual
110 nir_ssa_def *shift = nir_imul(b, compacted, nir_imm_int(b, 4));
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_eu_compact.c50 * 8-byte compacted instructions, allowing jump targets to be only 8-byte
60 * control flow instructions with UIP cannot be compacted, because of the
61 * replicated 13th bit. No control flow instructions can be compacted on Gen6
780 uint16_t *compacted)
784 *compacted = i;
796 uint16_t compacted; local in function:set_src0_index
799 if (!get_src_index(uncompacted, &compacted))
802 brw_compact_inst_set_src0_index(devinfo, dst, compacted);
811 uint16_t compacted; local in function:set_src1_index
814 compacted
779 get_src_index(uint16_t uncompacted,uint16_t * compacted) argument
1230 uint32_t compacted = brw_compact_inst_src0_index(devinfo, src); local in function:set_uncompacted_src0
1258 uint32_t compacted = brw_compact_inst_3src_control_index(devinfo, src); local in function:set_uncompacted_3src_control_index
1274 uint32_t compacted = brw_compact_inst_3src_source_index(devinfo, src); local in function:set_uncompacted_3src_source_index
[all...]
H A Dbrw_eu.c361 bool compacted = brw_inst_cmpt_control(devinfo, insn); local in function:brw_disassemble
365 if (compacted) {
366 brw_compact_inst *compacted = (void *)insn; local in function:brw_disassemble
377 /* Make compacted instructions hex value output vertically aligned
383 brw_uncompact_instruction(devinfo, &uncompacted, compacted);
400 brw_disassemble_inst(out, devinfo, insn, compacted);
H A Dbrw_eu_validate.c1839 brw_compact_inst *compacted = (void *)inst; local in function:brw_validate_instructions
1840 brw_uncompact_instruction(devinfo, &uncompacted, compacted);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_program.c708 uint32_t compacted = 0; local in function:crocus_print_binding_table
714 compacted += util_bitcount64(bt->used_mask[i]);
722 if (total != compacted) {
724 "(compacted to %u entries from %u entries)\n",
725 name, compacted, total);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_program.c745 uint32_t compacted = 0; local in function:iris_print_binding_table
751 compacted += util_bitcount64(bt->used_mask[i]);
759 if (total != compacted) {
761 "(compacted to %u entries from %u entries)\n",
762 name, compacted, total);
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D20.0.0.rst2511 - intel/compiler: Handle invalid compacted immediates

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