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    Searched refs:DIV_ROUND_UP (Results 1 - 25 of 293) sorted by relevancy

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  /xsrc/external/mit/MesaLib/dist/src/panfrost/lib/
pan_scratch.c 70 return util_logbase2_ceil(DIV_ROUND_UP(stack_size, 16));
  /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/
tu_util.c 111 fb->tile0.width = util_align_npot(DIV_ROUND_UP(fb->width, 2), tile_align_w);
112 fb->tile0.height = align(DIV_ROUND_UP(fb->height, 2), tile_align_h);
119 util_align_npot(DIV_ROUND_UP(fb->width, fb->tile_count.width), tile_align_w);
126 util_align_npot(DIV_ROUND_UP(fb->height, fb->tile_count.height), tile_align_h);
134 util_align_npot(DIV_ROUND_UP(fb->width, fb->tile_count.width), tile_align_w);
140 align(DIV_ROUND_UP(fb->height, fb->tile_count.height), tile_align_h);
162 DIV_ROUND_UP(fb->tile_count.width, fb->pipe0.width);
166 DIV_ROUND_UP(fb->tile_count.height, fb->pipe0.height);
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a5xx/
fd5_resource.c 33 unsigned lrz_pitch = align(DIV_ROUND_UP(rsc->b.b.width0, 8), 64);
34 unsigned lrz_height = DIV_ROUND_UP(rsc->b.b.height0, 8);
  /xsrc/external/mit/MesaLib/dist/src/intel/compiler/
brw_vec4_live_variables.h 118 const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
132 const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
brw_vec4_dead_code_eliminate.cpp 60 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
142 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
164 for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) {
  /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
brw_vec4_live_variables.h 92 const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
106 const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
brw_vec4_dead_code_eliminate.cpp 61 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
143 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
165 for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) {
brw_vec4_live_variables.cpp 79 for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) {
101 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
258 for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) {
269 for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) {
  /xsrc/external/mit/MesaLib.old/dist/src/intel/dev/
gen_device_info.h 148 DIV_ROUND_UP(GEN_DEVICE_MAX_SUBSLICES, 8)];
156 DIV_ROUND_UP(GEN_DEVICE_MAX_EUS_PER_SUBSLICE, 8)];
gen_device_info.c 1038 devinfo->subslice_slice_stride = DIV_ROUND_UP(max_subslices, 8);
1046 devinfo->eu_subslice_stride = DIV_ROUND_UP(devinfo->num_eu_per_subslice, 8);
1074 topology.base.subslice_offset = DIV_ROUND_UP(topology.base.max_slices, 8);
1075 topology.base.subslice_stride = DIV_ROUND_UP(topology.base.max_subslices, 8);
1079 uint32_t num_eu_per_subslice = DIV_ROUND_UP(n_eus, n_subslices);
1083 DIV_ROUND_UP(topology.base.max_subslices, 8);
1084 topology.base.eu_stride = DIV_ROUND_UP(num_eu_per_subslice, 8);
1138 devinfo->eu_subslice_stride = DIV_ROUND_UP(topology->max_eus_per_subslice, 8);
1141 assert(sizeof(devinfo->slice_masks) >= DIV_ROUND_UP(topology->max_slices, 8));
1142 memcpy(&devinfo->slice_masks, topology->data, DIV_ROUND_UP(topology->max_slices, 8))
    [all...]
  /xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
st_glsl_types.cpp 126 return DIV_ROUND_UP(type->components(), 2);
129 return DIV_ROUND_UP(type->components(), 4);
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
si_compute_blit.c 179 unsigned num_instructions = DIV_ROUND_UP(num_dwords, dwords_per_instruction);
185 info.grid[0] = DIV_ROUND_UP(num_dwords, dwords_per_wave);
213 unsigned size_12 = DIV_ROUND_UP(size, 12);
231 info.grid[0] = DIV_ROUND_UP(size_12, 64);
264 unsigned num_instructions = DIV_ROUND_UP(num_dwords, dwords_per_instruction);
270 info.grid[0] = DIV_ROUND_UP(num_dwords, dwords_per_wave);
557 info.grid[i] = DIV_ROUND_UP(dim[i], info.block[i]);
569 info.grid[0] = DIV_ROUND_UP(width, 64);
589 info.grid[0] = DIV_ROUND_UP(width, info.block[0]);
590 info.grid[1] = DIV_ROUND_UP(height, info.block[1])
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/intel/tools/
intel_noop_drm_shim.c 230 DIV_ROUND_UP(i915.devinfo.num_slices, 8) +
231 i915.devinfo.num_slices * DIV_ROUND_UP(i915.devinfo.num_subslices[0], 8) +
233 DIV_ROUND_UP(i915.devinfo.num_eu_per_subslice, 8);
254 info->subslice_offset = DIV_ROUND_UP(i915.devinfo.num_slices, 8);
255 info->subslice_stride = DIV_ROUND_UP(i915.devinfo.num_subslices[0], 8);
273 for (uint32_t i = 0; i < DIV_ROUND_UP(info->max_eus_per_subslice, 8); i++) {
275 (s * info->max_subslices + ss) * DIV_ROUND_UP(info->max_eus_per_subslice, 8) + i] =
  /xsrc/external/mit/MesaLib/dist/src/intel/dev/
intel_device_info.h 189 DIV_ROUND_UP(INTEL_DEVICE_MAX_SUBSLICES, 8)];
203 DIV_ROUND_UP(INTEL_DEVICE_MAX_EUS_PER_SUBSLICE, 8)];
  /xsrc/external/mit/MesaLib.old/dist/src/intel/common/
gen_urb_config.c 137 chunks[i] = DIV_ROUND_UP(min_entries[i] * entry_size_bytes[i],
141 DIV_ROUND_UP(devinfo->urb.max_entries[i] * entry_size_bytes[i],
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/
fd6_vsc.c 101 DIV_ROUND_UP(num_prims, 2);
fd6_const.c 55 .num_unit = DIV_ROUND_UP(sizedwords, 4)),
63 .num_unit = DIV_ROUND_UP(sizedwords, 4)),
74 uint32_t num_unit = DIV_ROUND_UP(sizedwords, 4);
229 int size_vec4s = DIV_ROUND_UP(v->constant_data_size, 16);
249 int size_vec4s = DIV_ROUND_UP(cb->buffer_size, 16);
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/
nouveau_winsys.h 52 push->cur += DIV_ROUND_UP(size, 4);
  /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/
bi_layout.c 83 return Y + DIV_ROUND_UP(constants, 2);
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
si_compute_blit.c 123 unsigned num_instructions = DIV_ROUND_UP(num_dwords, dwords_per_instruction);
129 info.grid[0] = DIV_ROUND_UP(num_dwords, dwords_per_wave);
401 info.grid[0] = DIV_ROUND_UP(width, 64);
413 info.grid[0] = DIV_ROUND_UP(width, 8);
414 info.grid[1] = DIV_ROUND_UP(height, 8);
491 info.grid[0] = DIV_ROUND_UP(num_threads, 64); /* includes the partial block */
580 info.grid[0] = DIV_ROUND_UP(width, 8);
581 info.grid[1] = DIV_ROUND_UP(height, 8);
592 info.grid[0] = DIV_ROUND_UP(width, 64);
  /xsrc/external/mit/MesaLib/dist/src/intel/common/
intel_urb_config.c 162 chunks[i] = DIV_ROUND_UP(min_entries[i] * entry_size_bytes[i],
166 DIV_ROUND_UP(devinfo->urb.max_entries[i] * entry_size_bytes[i],
  /xsrc/external/mit/MesaLib/dist/src/util/
u_idalloc.c 55 util_idalloc_resize(buf, DIV_ROUND_UP(initial_num_ids, 32));
105 unsigned num_alloc = DIV_ROUND_UP(num, 32);
  /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
radv_meta_dcc_retile.c 262 unsigned width = DIV_ROUND_UP(image->info.width, vk_format_get_blockwidth(image->vk_format));
263 unsigned height = DIV_ROUND_UP(image->info.height, vk_format_get_blockheight(image->vk_format));
265 unsigned dcc_width = DIV_ROUND_UP(width, image->planes[0].surface.u.gfx9.color.dcc_block_width);
267 DIV_ROUND_UP(height, image->planes[0].surface.u.gfx9.color.dcc_block_height);
  /xsrc/external/mit/MesaLib/dist/src/panfrost/shared/
pan_tiling.c 273 w = DIV_ROUND_UP(w, desc->block.width);
274 h = DIV_ROUND_UP(h, desc->block.height);
311 unsigned first_full_tile_x = DIV_ROUND_UP(x, TILE_WIDTH) * TILE_WIDTH;
312 unsigned first_full_tile_y = DIV_ROUND_UP(y, TILE_HEIGHT) * TILE_HEIGHT;
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/svga/include/
svga3d_surfacedefs.h 970 block_size->width = DIV_ROUND_UP(pixel_size->width,
972 block_size->height = DIV_ROUND_UP(pixel_size->height,
974 block_size->depth = DIV_ROUND_UP(pixel_size->depth,
1144 const uint32 rowstride = DIV_ROUND_UP(width, bw) * desc->bytes_per_block;
1145 const uint32 imgstride = DIV_ROUND_UP(height, bh) * rowstride;

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