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    Searched refs:IOBase (Results 1 - 25 of 105) sorted by relevancy

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  /xsrc/external/mit/xf86-video-sis/dist/src/
sis_cursor.h 46 SIS_MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000;
51 temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
54 SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
60 temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
63 SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
69 temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
71 SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
77 temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \
80 SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
86 temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0));
    [all...]
sis_accel.h 90 while(SIS_MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {}
103 while(SIS_MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {} \
109 ((UChar *)(pSiS->IOBase + BR(11)))
112 ((ULong *)(pSiS->IOBase + BR(11)))
118 SIS_MMIO_OUT16(pSiS->IOBase, BR(10) + 2, op); \
119 temp = SIS_MMIO_IN32(pSiS->IOBase, BR(10)); \
125 SIS_MMIO_OUT32(pSiS->IOBase, BR(4), ((rop << 24) | (color & 0xFFFFFF)));
129 SIS_MMIO_OUT32(pSiS->IOBase, BR(5), ((rop << 24) | (color & 0xFFFFFF)));
133 SIS_MMIO_OUT32(pSiS->IOBase, BR(5), (bgColor));
137 SIS_MMIO_OUT32(pSiS->IOBase, BR(4), (fgcolor))
    [all...]
sis310_accel.h 212 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x0400) != 0x0400) {}; \
213 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x0400) != 0x0400) {}; \
223 #define SiSGetHwRP() (CARD32)(SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR))
234 SIS_MMIO_OUT32(pSiS->IOBase, Q_WRITE_PTR, (CARD32)(*(pSiS->cmdQ_SharedWritePort)));
238 SIS_MMIO_OUT32(pSiS->IOBase, Q_WRITE_PTR, (p));
249 mcurrent = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
254 mcurrent = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
266 while(SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR) < pSiS->cmdQueueSize_div4) {} \
270 temppp = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
275 temppp = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR);
    [all...]
sis300_accel.h 114 while( (SIS_MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
115 while( (SIS_MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
116 while( (SIS_MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
117 CmdQueLen = (SIS_MMIO_IN16(pSiS->IOBase, 0x8240) & pSiS->CmdQueLenMask) - pSiS->CmdQueLenFix; \
123 SIS_MMIO_OUT32(pSiS->IOBase, BR(0), base);\
128 SIS_MMIO_OUT16(pSiS->IOBase, BR(1), pitch);\
133 SIS_MMIO_OUT32(pSiS->IOBase, BR(2), (CARD32)(x)<<16 | (CARD32)(y) );\
138 SIS_MMIO_OUT32(pSiS->IOBase, BR(4), base);\
143 SIS_MMIO_OUT32(pSiS->IOBase, BR(3), (CARD32)(x)<<16 | (CARD32)(y) );\
148 SIS_MMIO_OUT32(pSiS->IOBase, BR(5), (CARD32)(y)<<16 | (CARD32)(x) );
    [all...]
sis_dri.c 84 while((SIS_MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
85 while((SIS_MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
86 SIS_MMIO_IN16(pSiS->IOBase, 0x8240);
92 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
93 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
94 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
95 while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
593 *(CARD32 *)(pSiS->IOBase+0x8a2c) = 0;
705 *((unsigned char *)pSiS->IOBase + 0x8B50) = 0xff;
706 *(CARD32 *)(pSiS->IOBase + 0x8B60) = 0xffffffff
    [all...]
  /xsrc/external/mit/xf86-video-cirrus/dist/src/
lg.h 74 #define memrb(off) MMIO_IN8(pCir->IOBase,off)
75 #define memrw(off) MMIO_IN16(pCir->IOBase,off)
76 #define memrl(off) MMIO_IN32(pCir->IOBase,off)
77 #define memwb(off,val) MMIO_OUT8(pCir->IOBase,off,val)
78 #define memww(off,val) MMIO_OUT16(pCir->IOBase,off,val)
79 #define memwl(off,val) MMIO_OUT32(pCir->IOBase,off,val)
cir_driver.c 313 pCir->IOBase = NULL; /* Until we are ready to use MMIO */
323 pCir->IOBase =
326 if (pCir->IOBase == NULL)
330 void** result = (void**)&pCir->IOBase;
344 ErrorF("CirMapMem pCir->IOBase=0x%08x [length=%08x] from PCI=%08x\n",
345 pCir->IOBase, pCir->IoMapSize, pCir->IOAddress);
347 ((volatile unsigned char*) pCir->IOBase)[0x40]);
365 if (pCir->IOBase != NULL) {
370 xf86UnMapVidMem(scrnIndex, (pointer)pCir->IOBase, pCir->IoMapSize);
372 pci_device_unmap_range(pCir->PciInfo, (pointer)pCir->IOBase, pCir->IoMapSize)
    [all...]
cir.h 42 unsigned char *IOBase;
  /xsrc/external/mit/xf86-video-trident/dist/src/
trident_regs.h 297 MMIO_OUT32(pTrident->IOBase,(r),(v))
300 MMIO_IN32(pTrident->IOBase,(r))
305 MMIO_OUT8(pTrident->IOBase, addr, data); \
313 MMIO_OUT16(pTrident->IOBase, addr, data); \
321 MMIO_IN8(pTrident->IOBase, addr) : \
351 (b = MMIO_IN8(pTrident->IOBase,GER_STATUS) & GE_BUSY)
353 (b = MMIO_IN8(pTrident->IOBase,OLDGER_STATUS) & GE_BUSY)
355 MMIO_OUT32(pTrident->IOBase, IMAGE_GE_STATUS, (c))
357 MMIO_OUT8(pTrident->IOBase, GER_STATUS, (c))
359 MMIO_OUT8(pTrident->IOBase, OLDGER_STATUS, (c)
    [all...]
xp4_xaa.c 149 MMIO_OUT32(pTrident->IOBase, 0x2154,
151 MMIO_OUT32(pTrident->IOBase, 0x2150,
281 MMIO_OUT32(pTrident->IOBase, 0x2134, transparency_color);
286 MMIO_OUT32(pTrident->IOBase, 0x2128,
306 MMIO_OUT32(pTrident->IOBase, 0x2138, (x2 << 16) | y2);
307 MMIO_OUT32(pTrident->IOBase, 0x213C, (x1 << 16) | y1);
308 MMIO_OUT32(pTrident->IOBase, 0x2140, (w << 16) | h);
310 MMIO_OUT32(pTrident->IOBase, 0x2124,
455 MMIO_OUT32(pTrident->IOBase, 0x2158, color);
456 MMIO_OUT32(pTrident->IOBase, 0x2128, 1 << 14)
    [all...]
xp4_exa.c 144 MMIO_OUT32(pTrident->IOBase, 0x2150, (dptch << 18) | (dorg >> 4));
147 MMIO_OUT32(pTrident->IOBase, 0x2158, fg);
148 MMIO_OUT32(pTrident->IOBase, 0x2128, 1 << 14);
174 MMIO_OUT32(pTrident->IOBase, 0x2138, (x1 << 16) | y1);
175 MMIO_OUT32(pTrident->IOBase, 0x2140, ((x2 - x1) << 16) |
177 MMIO_OUT32(pTrident->IOBase, 0x2124,
206 MMIO_OUT32(pTrident->IOBase, 0x2154, (sptch << 18) | (sorg >> 4));
207 MMIO_OUT32(pTrident->IOBase, 0x2150, (dptch << 18) | (dorg >> 4));
242 MMIO_OUT32(pTrident->IOBase, 0x2128, pTrident->BltScanDirection |
244 MMIO_OUT32(pTrident->IOBase, 0x2138, (x2 << 16) | y2)
    [all...]
trident_i2c.c 21 int vgaIOBase = VGAHWPTR(pTrident->pScrn)->IOBase;
41 int vgaIOBase = VGAHWPTR(pTrident->pScrn)->IOBase;
xp_xaa.c 140 MMIO_OUT32(pTrident->IOBase, 0x2154,
142 MMIO_OUT32(pTrident->IOBase, 0x2150,
144 MMIO_OUT8(pTrident->IOBase, 0x2126, 3);
312 MMIO_OUT32(pTrident->IOBase, 0x2134, transparency_color);
486 MMIO_OUT32(pTrident->IOBase, 0x2158, color);
568 MMIO_OUT32(pTrident->IOBase, 0x2158, fg);
572 MMIO_OUT32(pTrident->IOBase, 0x215C, ~fg);
575 MMIO_OUT32(pTrident->IOBase, 0x215C, bg);
580 MMIO_OUT32(pTrident->IOBase, 0x2180, patternx);
581 MMIO_OUT32(pTrident->IOBase, 0x2184, patterny)
    [all...]
tvga_dac.c 46 vgaIOBase = VGAHWPTR(pScrn)->IOBase;
135 vgaIOBase = VGAHWPTR(pScrn)->IOBase;
179 vgaIOBase = VGAHWPTR(pScrn)->IOBase;
  /xsrc/external/mit/xf86-video-siliconmotion/dist/src/
regsmi.h 63 if (pSmi->IOBase) {
64 MMIO_OUT8(pSmi->IOBase, indexPort, index);
65 return(MMIO_IN8(pSmi->IOBase, dataPort));
75 if (pSmi->IOBase) {
76 MMIO_OUT8(pSmi->IOBase, indexPort, index);
77 MMIO_OUT8(pSmi->IOBase, dataPort, data);
87 if (pSmi->IOBase) {
88 return(MMIO_IN8(pSmi->IOBase, port));
97 if (pSmi->IOBase) {
98 MMIO_OUT8(pSmi->IOBase, port, data)
    [all...]
  /xsrc/external/mit/xf86-video-mga/dist/src/
mga_vga.c 54 /* save hwp->IOBase and temporarily set it for colour mode */
55 savedIOBase = hwp->IOBase;
56 hwp->IOBase = VGA_IOBASE_COLOR;
123 hwp->IOBase = savedIOBase;
171 /* save hwp->IOBase and temporarily set it for colour mode */
172 savedIOBase = hwp->IOBase;
173 hwp->IOBase = VGA_IOBASE_COLOR;
230 hwp->IOBase = savedIOBase;
254 hwp->IOBase = VGA_IOBASE_COLOR;
256 hwp->IOBase = VGA_IOBASE_MONO
    [all...]
  /xsrc/external/mit/xf86-video-tga/dist/src/
tga_regs.h 50 *(unsigned int *)((char*)(pTga->IOBase)+(r)) = (v);\
55 ( *(unsigned int *)((char*)(pTga->IOBase)+(r)))
78 #define TGA_DECL() register unsigned long iobase, offset
79 #define TGA_GET_IOBASE() iobase = (unsigned long)pTga->IOBase;
97 *(unsigned int *)(iobase + offset + (r)) = v;\
108 *(unsigned int *)(iobase + offset + (r)) = v;\
  /xsrc/external/mit/xf86-video-chips/dist/src/
ct_regs.c 308 if (hwp->IOBase == VGA_IOBASE_MONO) {
320 if (hwp->IOBase == VGA_IOBASE_MONO) {
365 if (hwp->IOBase == VGA_IOBASE_MONO)
381 if (hwp->IOBase == VGA_IOBASE_MONO)
404 if (hwp->IOBase == VGA_IOBASE_MONO)
415 if (hwp->IOBase == VGA_IOBASE_MONO)
468 if (hwp->IOBase == VGA_IOBASE_MONO)
483 if (hwp->IOBase == VGA_IOBASE_MONO) {
  /xsrc/external/mit/xf86-video-nv/dist/src/
riva_setup.c 38 VGA_WR08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
39 VGA_WR08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
44 VGA_WR08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
45 return (VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
76 tmp = VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
89 tmp = VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
112 tmp = VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
121 tmp = VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
riva_driver.c 615 if (pRiva->pEnt->device->IOBase != 0) {
617 if (!xf86CheckPciMemBase(pRiva->PciInfo, pRiva->pEnt->device->IOBase)) {
619 "IOBase 0x%08lX doesn't match any PCI base register.\n",
620 pRiva->pEnt->device->IOBase);
625 pRiva->IOAddress = pRiva->pEnt->device->IOBase;
833 pRiva->IOBase = tmp;
840 pRiva->IOBase = xf86MapPciMem(pScrn->scrnIndex,
848 if (pRiva->IOBase == NULL)
870 pRiva->IOBase = fbdevHWMapMMIO(pScrn);
871 if (pRiva->IOBase == NULL
    [all...]
  /xsrc/external/mit/xorg-server.old/dist/hw/xfree86/vgahw/
vgaHW.c 166 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_INDEX_OFFSET, index);
167 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET, value);
173 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_INDEX_OFFSET, index);
174 return inb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET);
214 return inb(hwp->IOBase + hwp->PIOOffset + VGA_IN_STAT_1_OFFSET);
226 outb(hwp->IOBase + hwp->PIOOffset + VGA_FEATURE_W_OFFSET,value);
237 (void) inb(hwp->IOBase + hwp->PIOOffset + VGA_IN_STAT_1_OFFSET);
250 (void) inb(hwp->IOBase + hwp->PIOOffset + VGA_IN_STAT_1_OFFSET);
270 (void) inb(hwp->IOBase + hwp->PIOOffset + VGA_IN_STAT_1_OFFSET);
278 (void) inb(hwp->IOBase + hwp->PIOOffset + VGA_IN_STAT_1_OFFSET)
    [all...]
  /xsrc/external/mit/xf86-video-glint/dist/src/
pm2_accel.c 230 pGlint->IOBase + OutputFIFO + 4;
896 GLINT_MoveDWORDS((CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
992 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1004 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1042 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1053 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1068 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1079 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1159 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
1171 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4)
    [all...]
pm_accel.c 249 pGlint->IOBase + OutputFIFO + 4;
694 pGlint->XAAScanlineColorExpandBuffers[0] = pGlint->IOBase+OutputFIFO+4;
719 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
728 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
796 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
808 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
838 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
849 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
922 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4),
934 (CARD32*)((char*)pGlint->IOBase + OutputFIFO + 4)
    [all...]
  /xsrc/external/mit/xorg-server/dist/hw/xfree86/vgahw/
vgaHW.c 164 pci_io_write8(hwp->io, hwp->IOBase + VGA_CRTC_INDEX_OFFSET, index);
165 pci_io_write8(hwp->io, hwp->IOBase + VGA_CRTC_DATA_OFFSET, value);
171 pci_io_write8(hwp->io, hwp->IOBase + VGA_CRTC_INDEX_OFFSET, index);
172 return pci_io_read8(hwp->io, hwp->IOBase + VGA_CRTC_DATA_OFFSET);
212 return pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
224 pci_io_write8(hwp->io, hwp->IOBase + VGA_FEATURE_W_OFFSET, value);
235 (void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
248 (void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
268 (void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
276 (void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET)
    [all...]
  /xsrc/external/mit/xf86-video-savage/dist/src/
savage_hwmc.c 84 unsigned int IOBase;
295 contextRec->IOBase = hwp->IOBase;

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