| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/tests/ |
| ssa_def_bits_used_tests.cpp | 81 nir_ssa_def *src0 = nir_imm_ivec4(&bld,
110 nir_ssa_def *src0 = nir_imm_ivec4(&bld,
141 nir_ssa_def *src1 = nir_imm_ivec4(&bld,
172 nir_ssa_def *src1 = nir_imm_ivec4(&bld,
203 nir_ssa_def *src1 = nir_imm_ivec4(&bld,
234 nir_ssa_def *src1 = nir_imm_ivec4(&bld,
|
| vars_tests.cpp | 1779 nir_store_var(b, out, nir_imm_ivec4(b, 0, 0, 0, 0), 1 << 0);
1780 nir_store_var(b, out, nir_imm_ivec4(b, 1, 1, 1, 1), 1 << 1);
1781 nir_store_var_volatile(b, out, nir_imm_ivec4(b, -1, -2, -3, -4), 0xf);
1782 nir_store_var(b, out, nir_imm_ivec4(b, 2, 2, 2, 2), 1 << 2);
1783 nir_store_var(b, out, nir_imm_ivec4(b, 3, 3, 3, 3), 1 << 3);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/d3d12/ |
| d3d12_nir_lower_vs_vertex_conversion.c | 61 nir_ssa_def *rshift = nir_imm_ivec4(b, 22, 22, 22, 30);
92 return nir_imm_ivec4(b, 22, 12, 2, 0);
98 return nir_imm_ivec4(b, 2, 12, 22, 0);
|
| /xsrc/external/mit/MesaLib/dist/src/panfrost/util/ |
| pan_lower_framebuffer.c | 268 nir_ssa_def *shifts = nir_imm_ivec4(b, 8 - x, 8 - y, 8 - z, 8 - w);
307 nir_ssa_def *top8 = nir_ushr(b, s, nir_imm_ivec4(b, 0x2, 0x2, 0x2, 0x2));
310 nir_ssa_def *bottom2 = nir_iand(b, s, nir_imm_ivec4(b, 0x3, 0x3, 0x3, 0x3));
334 v = nir_imin(b, v, nir_imm_ivec4(b, 511, 511, 511, 1));
335 v = nir_imax(b, v, nir_imm_ivec4(b, -512, -512, -512, -2));
337 v = nir_umin(b, v, nir_imm_ivec4(b, 1023, 1023, 1023, 3));
340 v = nir_ishl(b, v, nir_imm_ivec4(b, 0, 10, 20, 30));
357 v = nir_ishl(b, v, nir_imm_ivec4(b, 22, 12, 2, 0));
360 v = nir_ishr(b, v, nir_imm_ivec4(b, 22, 22, 22, 30));
362 v = nir_ushr(b, v, nir_imm_ivec4(b, 22, 22, 22, 30))
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_nir_attribute_workarounds.c | 70 nir_ssa_def *shift = nir_imm_ivec4(b, 22, 22, 22, 30);
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_nir_attribute_workarounds.c | 77 nir_ssa_def *shift = nir_imm_ivec4(b, 22, 22, 22, 30);
|
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_lower_blend.c | 170 return nir_imm_ivec4(b, 0, 0, 0, 0);
200 return nir_imm_ivec4(b, ~0, ~0, ~0, ~0);
|
| nir_builder.h | 429 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w) function
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_shaderlib_nir.c | 129 nir_channels(&b, nir_imm_ivec4(&b, tex->surface.u.gfx9.color.dcc_block_width,
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| sfn_nir_lower_tess_io.cpp | 125 case 4: return nir_imm_ivec4(b, 0, 4, 8, 12);
137 auto full_mask = nir_imm_ivec4(b, 0, 4, 8, 12);
|
| sfn_nir.cpp | 622 addr = nir_iadd(&b, addr, nir_imm_ivec4(&b, 0, 4, 8, 12));
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| radv_meta_buffer.c | 20 nir_ssa_def *block_size = nir_imm_ivec4(&b,
74 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_meta_fmask_expand.c | 61 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_meta_bufimage.c | 65 nir_ssa_def *block_size = nir_imm_ivec4(&b,
294 nir_ssa_def *block_size = nir_imm_ivec4(&b,
516 nir_ssa_def *block_size = nir_imm_ivec4(&b,
724 nir_ssa_def *block_size = nir_imm_ivec4(&b,
937 nir_ssa_def *block_size = nir_imm_ivec4(&b,
1144 nir_ssa_def *block_size = nir_imm_ivec4(&b,
1336 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_meta_resolve_cs.c | 98 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_query.c | 157 nir_ssa_def *block_size = nir_imm_ivec4(&b,
358 nir_ssa_def *block_size = nir_imm_ivec4(&b,
605 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_meta_fast_clear.c | 63 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| radv_meta_clear.c | 1067 nir_ssa_def *block_size = nir_imm_ivec4(&b,
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_meta.c | 704 nir_imm_ivec4(b, b->shader->info.workgroup_size[0], b->shader->info.workgroup_size[1],
|
| radv_meta_decompress.c | 59 nir_imm_ivec4(&b, b.shader->info.workgroup_size[0], b.shader->info.workgroup_size[1],
|
| radv_pipeline_rt.c | 1560 nir_store_var(b, child_indices, nir_imm_ivec4(b, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu), 0xf);
1836 nir_ssa_def *desc = nir_imm_ivec4(
|
| radv_acceleration_structure.c | 1383 nir_imm_ivec4(&b, b.shader->info.workgroup_size[0], b.shader->info.workgroup_size[1],
|
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_builder.h | 371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w) function
|
