/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
ppatomctrl.h | 90 uint8_t uc_pll_ref_div; /* Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_ci 100 uint8_t uc_pll_ref_div; /*Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_vi
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ppatomctrl.h | 90 uint8_t uc_pll_ref_div; /* Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_ci 100 uint8_t uc_pll_ref_div; /*Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_vi
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ppatomctrl.h | 90 uint8_t uc_pll_ref_div; /* Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_ci 100 uint8_t uc_pll_ref_div; /*Output Parameter: PLL ref divider */ member in struct:pp_atomctrl_clock_dividers_vi
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amdgpu_ppatomctrl.c | 402 dividers->uc_pll_ref_div = 472 dividers->uc_pll_ref_div =
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amdgpu_ppatomctrl.c | 402 dividers->uc_pll_ref_div = 472 dividers->uc_pll_ref_div =
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amdgpu_ppatomctrl.c | 402 dividers->uc_pll_ref_div = 472 dividers->uc_pll_ref_div =
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/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
amdgpu_fiji_smumgr.c | 886 ref_divider = 1 + dividers.uc_pll_ref_div; 893 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_iceland_smumgr.c | 824 reference_divider = 1 + dividers.uc_pll_ref_div; 831 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_fiji_smumgr.c | 886 ref_divider = 1 + dividers.uc_pll_ref_div; 893 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_iceland_smumgr.c | 824 reference_divider = 1 + dividers.uc_pll_ref_div; 831 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_fiji_smumgr.c | 886 ref_divider = 1 + dividers.uc_pll_ref_div; 893 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_iceland_smumgr.c | 824 reference_divider = 1 + dividers.uc_pll_ref_div; 831 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_ci_smumgr.c | 324 ref_divider = 1 + dividers.uc_pll_ref_div; 331 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_tonga_smumgr.c | 567 reference_divider = 1 + dividers.uc_pll_ref_div; 574 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_ci_smumgr.c | 324 ref_divider = 1 + dividers.uc_pll_ref_div; 331 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_tonga_smumgr.c | 567 reference_divider = 1 + dividers.uc_pll_ref_div; 574 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_ci_smumgr.c | 324 ref_divider = 1 + dividers.uc_pll_ref_div; 331 SPLL_REF_DIV, dividers.uc_pll_ref_div);
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amdgpu_tonga_smumgr.c | 567 reference_divider = 1 + dividers.uc_pll_ref_div; 574 CG_SPLL_FUNC_CNTL, SPLL_REF_DIV, dividers.uc_pll_ref_div);
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