| /src/sys/dev/i2c/ |
| ddcreg.h | 38 #define DDC_ADDR 0x50
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| ddcreg.h | 38 #define DDC_ADDR 0x50
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| tvpll_tuners.c | 48 static uint8_t tdvs_h06xf_initdata[] = { 2, 0xdf, 0x50 };
50 { 165000000, 62500, 0xce, 0x01, 0x50 },
51 { 450000000, 62500, 0xce, 0x02, 0x50 },
52 { 999999999, 62500, 0xce, 0x04, 0x50 },
|
| tvpll_tuners.c | 48 static uint8_t tdvs_h06xf_initdata[] = { 2, 0xdf, 0x50 };
50 { 165000000, 62500, 0xce, 0x01, 0x50 },
51 { 450000000, 62500, 0xce, 0x02, 0x50 },
52 { 999999999, 62500, 0xce, 0x04, 0x50 },
|
| /src/sys/dev/acpi/ |
| fdc_acpireg.h | 41 #define ACPI_FDC_DISKETTE_TYPE5 0x50
49 { 9, 2, 18, 2, 0xff, 0xdf, 0x23, 0x50, 40, 720, 2, FDC_300KBPS,
51 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 40, 720, 1, FDC_250KBPS,
53 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 80, 1440, 1, FDC_250KBPS,
55 { 9, 2, 18, 2, 0xff, 0xdf, 0x23, 0x50, 80, 1440, 1, FDC_300KBPS,
57 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 40, 720, 2, FDC_250KBPS,
|
| fdc_acpireg.h | 41 #define ACPI_FDC_DISKETTE_TYPE5 0x50
49 { 9, 2, 18, 2, 0xff, 0xdf, 0x23, 0x50, 40, 720, 2, FDC_300KBPS,
51 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 40, 720, 1, FDC_250KBPS,
53 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 80, 1440, 1, FDC_250KBPS,
55 { 9, 2, 18, 2, 0xff, 0xdf, 0x23, 0x50, 80, 1440, 1, FDC_300KBPS,
57 { 9, 2, 18, 2, 0xff, 0xdf, 0x2a, 0x50, 40, 720, 2, FDC_250KBPS,
|
| /src/share/locale/ctype/charset/ |
| Latin-Cyrillic | 11 ALPHA 0x50 - 0x6f
15 LOWER 0x50 - 0x6f 0x71 - 0x7c 0x7e - 0x7f
25 MAPLOWER < 0x30 - 0x4f : 0x50 >
26 MAPLOWER < 0x50 - 0x6f : 0x50 >
33 MAPUPPER < 0x50 - 0x6f : 0x30 >
|
| Latin-Cyrillic | 11 ALPHA 0x50 - 0x6f
15 LOWER 0x50 - 0x6f 0x71 - 0x7c 0x7e - 0x7f
25 MAPLOWER < 0x30 - 0x4f : 0x50 >
26 MAPLOWER < 0x50 - 0x6f : 0x50 >
33 MAPUPPER < 0x50 - 0x6f : 0x30 >
|
| /src/sys/arch/evbmips/sbmips/ |
| swarm.h | 63 #define BIGEEPROM_SMBUS_DEV 0x50
76 #define PCF8563_SMBUS_DEV 0x50
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| swarm.h | 63 #define BIGEEPROM_SMBUS_DEV 0x50
76 #define PCF8563_SMBUS_DEV 0x50
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| /src/sys/arch/sbmips/include/ |
| swarm.h | 63 #define BIGEEPROM_SMBUS_DEV 0x50
76 #define PCF8563_SMBUS_DEV 0x50
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| swarm.h | 63 #define BIGEEPROM_SMBUS_DEV 0x50
76 #define PCF8563_SMBUS_DEV 0x50
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| /src/sys/dev/pci/ |
| cyberreg.h | 47 #define SIIG10x_USR_BASE 0x50
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| cyberreg.h | 47 #define SIIG10x_USR_BASE 0x50
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| pciide_piccolo_reg.h | 33 #define PICCOLO_PIO_TIMING 0x50
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| pciide_piccolo_reg.h | 33 #define PICCOLO_PIO_TIMING 0x50
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| /src/common/lib/libc/arch/sparc/gen/ |
| saveregs.S | 58 st %i3, [%fp + 0x50] ! fr->fr_argd[3]
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| /src/sys/arch/hpcmips/stand/lcboot/ |
| i28f128reg.h | 49 #define I28F128_CLEAR_STATUS 0x50
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| /src/sys/arch/i386/isa/ |
| nvram.h | 62 #define NVRAM_DISKETTE_TYPE5 0x50 /* 2.88M, presumably */
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| /src/sys/arch/mips/alchemy/dev/ |
| usbdreg.h | 60 #define USBD_EP3RDSTAT 0x50 /* EP3 Read FIFO Status */
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| /src/sys/arch/prep/include/pc/ |
| display.h | 35 #define BG_MAGENTA 0x50
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| /src/sys/arch/sandpoint/isa/ |
| nvram.h | 61 #define NVRAM_DISKETTE_TYPE5 0x50 /* 2.88M, presumably */
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| /src/sys/arch/sgimips/hpc/ |
| haltworeg.h | 45 #define HAL2_REG_CTL_IDR1 0x50
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| /src/sys/arch/shark/isa/ |
| nvram.h | 61 #define NVRAM_DISKETTE_TYPE5 0x50 /* 2.88M, presumably */
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| /src/sys/arch/vax/vax/ |
| db_disasm.h | 67 ((x) == 0xfd98) ? 0x50 : \
|
