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      1 /* $NetBSD: swarm.h,v 1.2 2002/11/12 01:22:26 simonb Exp $ */
      2 
      3 /*
      4  * I/O Address assignments for the CSWARM board
      5  *
      6  * Summary of address map:
      7  *
      8  * Address         Size   CSel    Description
      9  * --------------- ----   ------  --------------------------------
     10  * 0x1FC00000      2MB     CS0    Boot ROM
     11  * 0x1F800000      2MB     CS1    Alternate boot ROM
     12  *                         CS2    Unused
     13  * 0x100A0000      64KB    CS3    LED display
     14  * 0x100B0000      64KB    CS4    IDE Disk
     15  *                         CS5    Unused
     16  * 0x11000000      64MB    CS6    PCMCIA
     17  *                         CS7    Unused
     18  *
     19  * GPIO assignments
     20  *
     21  * GPIO#    Direction	Description
     22  * -------  ---------	------------------------------------------
     23  * GPIO0    Output	Debug LED
     24  * GPIO1    Output	Sturgeon NMI
     25  * GPIO2    Input	PHY Interrupt			(interrupt)
     26  * GPIO3    Input	Nonmaskable Interrupt		(interrupt)
     27  * GPIO4    Input	IDE Disk Interrupt		(interrupt)
     28  * GPIO5    Input	Temperature Sensor Alert	(interrupt)
     29  * GPIO6    N/A		PCMCIA interface
     30  * GPIO7    N/A		PCMCIA interface
     31  * GPIO8    N/A		PCMCIA interface
     32  * GPIO9    N/A		PCMCIA interface
     33  * GPIO10   N/A		PCMCIA interface
     34  * GPIO11   N/A		PCMCIA interface
     35  * GPIO12   N/A		PCMCIA interface
     36  * GPIO13   N/A		PCMCIA interface
     37  * GPIO14   N/A		PCMCIA interface
     38  * GPIO15   N/A		PCMCIA interface
     39 */
     40 
     41 
     42 /* GPIO pins */
     43 #define	GPIO_DEBUG_LED		0
     44 #define	GPIO_STURGEON_NMI	1
     45 #define	GPIO_PHY_INTERRUPT	2
     46 #define	GPIO_NONMASKABLE_INT	3
     47 #define	GPIO_IDE_INTERRUPT	4
     48 #define	GPIO_TEMP_SENSOR_INT	5
     49 
     50 /* device addresses */
     51 #define	SWARM_LEDS_PHYS		0x100a0000
     52 #define	SWARM_IDE_PHYS		0x100b0000
     53 #define	SWARM_PCMCIA_PHYS	0x11000000
     54 
     55 /* SMBus devices */
     56 #define	TEMPSENSOR_SMBUS_CHAN	0
     57 #define	TEMPSENSOR_SMBUS_DEV	0x2A
     58 
     59 #define	DRAM_SMBUS_CHAN		0
     60 #define	DRAM_SMBUS_DEV		0x54
     61 
     62 #define	BIGEEPROM_SMBUS_CHAN	0
     63 #define	BIGEEPROM_SMBUS_DEV	0x50
     64 
     65 #define	BIGEEPROM_SMBUS_CHAN_1	1	/* rev 2.0 swarm only */
     66 #define	BIGEEPROM_SMBUS_DEV_1	0x51
     67 
     68 #define	CFG_DRAM_SMBUS_CHAN	0
     69 #define	CFG_DRAM_SMBUS_BASE	0x54	/* starting SMBus device base */
     70 
     71 #define	X1241_SMBUS_CHAN	1	/* rev 1.0 swarm only, fixed slave address */
     72 
     73 #define	M41T81_SMBUS_CHAN	1	/* rev 2.0 swarm only (or PCF8563), fixed slave address */
     74 
     75 #define	PCF8563_SMBUS_CHAN	1	/* rev 2.0 swarm only (or M41T81) */
     76 #define	PCF8563_SMBUS_DEV	0x50
     77 
     78 #define	MAX1617A_SMBUS_CHAN	0	/* or MAX6654 on newer board, reg compatible */
     79 #define	MAX1617A_SMBUS_DEV	0x2a
     80