1 /* $NetBSD: atomic_inc.S,v 1.7 2020/08/06 10:00:21 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <machine/asm.h> 30 #include "atomic_op_asm.h" 31 32 RCSID("$NetBSD: atomic_inc.S,v 1.7 2020/08/06 10:00:21 skrll Exp $") 33 34 .text 35 .set noreorder 36 #ifdef _KERNEL_OPT 37 #include "opt_cputype.h" 38 #ifndef MIPS3_LOONGSON2F 39 .set noat 40 .set nomacro 41 #endif 42 #else /* _KERNEL_OPT */ 43 .set noat 44 .set nomacro 45 #endif /* _KERNEL_OPT */ 46 47 48 LEAF(_atomic_inc_32) 49 #if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2) 50 li t0, 1 51 saa t0, (a0) 52 #else 53 LLSCSYNC 54 1: INT_LL t0, 0(a0) 55 nop 56 INT_ADDU t0, 1 57 INT_SC t0, 0(a0) 58 beq t0, zero, 1b 59 nop 60 #endif 61 j ra 62 nop 63 END(_atomic_inc_32) 64 ATOMIC_OP_ALIAS(atomic_inc_32, _atomic_inc_32) 65 66 LEAF(_atomic_inc_32_nv) 67 LLSCSYNC 68 1: INT_LL v0, 0(a0) 69 nop 70 INT_ADDU v0, 1 71 move t0, v0 72 INT_SC t0, 0(a0) 73 beq t0, zero, 1b 74 nop 75 j ra 76 nop 77 END(_atomic_inc_32_nv) 78 ATOMIC_OP_ALIAS(atomic_inc_32_nv, _atomic_inc_32_nv) 79 80 #if !defined(__mips_o32) 81 LEAF(_atomic_inc_64) 82 #if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2) 83 li t0, 1 84 saad t0, (a0) 85 #else 86 LLSCSYNC 87 1: REG_LL t0, 0(a0) 88 nop 89 REG_ADDU t0, 1 90 REG_SC t0, 0(a0) 91 beq t0, zero, 1b 92 nop 93 #endif 94 j ra 95 nop 96 END(_atomic_inc_64) 97 ATOMIC_OP_ALIAS(atomic_inc_64, _atomic_inc_64) 98 99 LEAF(_atomic_inc_64_nv) 100 LLSCSYNC 101 1: REG_LL v0, 0(a0) 102 nop 103 REG_ADDU v0, 1 104 move t0, v0 105 REG_SC t0, 0(a0) 106 beq t0, zero, 1b 107 nop 108 j ra 109 nop 110 END(_atomic_inc_64_nv) 111 ATOMIC_OP_ALIAS(atomic_inc_64_nv, _atomic_inc_64_nv) 112 #endif 113 114 #ifdef _LP64 115 STRONG_ALIAS(_atomic_inc_ptr, _atomic_inc_64) 116 STRONG_ALIAS(_atomic_inc_ptr_nv, _atomic_inc_64_nv) 117 STRONG_ALIAS(_atomic_inc_ulong, _atomic_inc_64) 118 STRONG_ALIAS(_atomic_inc_ulong_nv, _atomic_inc_64_nv) 119 #else 120 STRONG_ALIAS(_atomic_inc_ptr, _atomic_inc_32) 121 STRONG_ALIAS(_atomic_inc_ptr_nv, _atomic_inc_32_nv) 122 STRONG_ALIAS(_atomic_inc_ulong, _atomic_inc_32) 123 STRONG_ALIAS(_atomic_inc_ulong_nv, _atomic_inc_32_nv) 124 #endif 125 STRONG_ALIAS(_atomic_inc_uint, _atomic_inc_32) 126 STRONG_ALIAS(_atomic_inc_uint_nv, _atomic_inc_32_nv) 127 128 ATOMIC_OP_ALIAS(atomic_inc_ptr, _atomic_inc_ptr) 129 ATOMIC_OP_ALIAS(atomic_inc_ptr_nv, _atomic_inc_ptr_nv) 130 ATOMIC_OP_ALIAS(atomic_inc_uint, _atomic_inc_uint) 131 ATOMIC_OP_ALIAS(atomic_inc_uint_nv, _atomic_inc_uint_nv) 132 ATOMIC_OP_ALIAS(atomic_inc_ulong, _atomic_inc_ulong) 133 ATOMIC_OP_ALIAS(atomic_inc_ulong_nv, _atomic_inc_ulong_nv) 134
Indexes created Sat Sep 20 22:09:52 GMT 2025