1 #include <machine/asm.h> 2 .text 3 .p2align 3 4 .globl rv64i_zvkb_zvkned_ctr32_encrypt_blocks 5 .type rv64i_zvkb_zvkned_ctr32_encrypt_blocks,@function 6 rv64i_zvkb_zvkned_ctr32_encrypt_blocks: 7 beqz a2, 1f 8 9 # Load number of rounds 10 lwu t0, 240(a3) 11 li t1, 14 12 li t2, 12 13 li t3, 10 14 15 slli t5, a2, 2 16 17 beq t0, t1, ctr32_encrypt_blocks_256 18 beq t0, t2, ctr32_encrypt_blocks_192 19 beq t0, t3, ctr32_encrypt_blocks_128 20 21 1: 22 ret 23 24 .size rv64i_zvkb_zvkned_ctr32_encrypt_blocks,.-rv64i_zvkb_zvkned_ctr32_encrypt_blocks 25 .p2align 3 26 ctr32_encrypt_blocks_128: 27 # Load all 11 round keys to v1-v11 registers. 28 .word 3439489111 29 .word 34005127 30 addi a3, a3, 16 31 .word 34005255 32 addi a3, a3, 16 33 .word 34005383 34 addi a3, a3, 16 35 .word 34005511 36 addi a3, a3, 16 37 .word 34005639 38 addi a3, a3, 16 39 .word 34005767 40 addi a3, a3, 16 41 .word 34005895 42 addi a3, a3, 16 43 .word 34006023 44 addi a3, a3, 16 45 .word 34006151 46 addi a3, a3, 16 47 .word 34006279 48 addi a3, a3, 16 49 .word 34006407 50 51 # Setup mask into v0 52 # The mask pattern for 4*N-th elements 53 # mask v0: [000100010001....] 54 # Note: 55 # We could setup the mask just for the maximum element length instead of 56 # the VLMAX. 57 li t0, 0b10001000 58 .word 201356247 59 .word 1577238615 60 # Load IV. 61 # v31:[IV0, IV1, IV2, big-endian count] 62 .word 3439489111 63 .word 34041735 64 # Convert the big-endian counter into little-endian. 65 .word 3305271383 66 .word 1240772567 67 # Splat the IV to v16 68 .word 221212759 69 .word 1577072727 70 .word 2817763447 71 # Prepare the ctr pattern into v20 72 # v20: [x, x, x, 0, x, x, x, 1, x, x, x, 2, ...] 73 .word 1342712407 74 # v16:[IV0, IV1, IV2, count+0, IV0, IV1, IV2, count+1, ...] 75 .word 86998743 76 .word 17434711 77 78 79 ##### AES body 80 j 2f 81 1: 82 .word 86998743 83 # Increase ctr in v16. 84 .word 17811543 85 2: 86 # Load plaintext into v20 87 .word 33909255 88 slli t0, t4, 2 89 srli t6, t4, 2 90 sub t5, t5, t4 91 add a0, a0, t0 92 # Prepare the AES ctr input into v24. 93 # The ctr data uses big-endian form. 94 .word 1577585751 95 .word 1233431639 96 97 .word 2786307191 98 .word 2787191927 99 .word 2788240503 100 .word 2789289079 101 .word 2790337655 102 .word 2791386231 103 .word 2792434807 104 .word 2793483383 105 .word 2794531959 106 .word 2795580535 107 .word 2796661879 108 109 # ciphertext 110 .word 797576279 111 112 # Store the ciphertext. 113 .word 33942567 114 add a1, a1, t0 115 116 bnez t5, 1b 117 118 ret 119 .size ctr32_encrypt_blocks_128,.-ctr32_encrypt_blocks_128 120 .p2align 3 121 ctr32_encrypt_blocks_192: 122 # Load all 13 round keys to v1-v13 registers. 123 .word 3439489111 124 .word 34005127 125 addi a3, a3, 16 126 .word 34005255 127 addi a3, a3, 16 128 .word 34005383 129 addi a3, a3, 16 130 .word 34005511 131 addi a3, a3, 16 132 .word 34005639 133 addi a3, a3, 16 134 .word 34005767 135 addi a3, a3, 16 136 .word 34005895 137 addi a3, a3, 16 138 .word 34006023 139 addi a3, a3, 16 140 .word 34006151 141 addi a3, a3, 16 142 .word 34006279 143 addi a3, a3, 16 144 .word 34006407 145 addi a3, a3, 16 146 .word 34006535 147 addi a3, a3, 16 148 .word 34006663 149 150 # Setup mask into v0 151 # The mask pattern for 4*N-th elements 152 # mask v0: [000100010001....] 153 # Note: 154 # We could setup the mask just for the maximum element length instead of 155 # the VLMAX. 156 li t0, 0b10001000 157 .word 201356247 158 .word 1577238615 159 # Load IV. 160 # v31:[IV0, IV1, IV2, big-endian count] 161 .word 3439489111 162 .word 34041735 163 # Convert the big-endian counter into little-endian. 164 .word 3305271383 165 .word 1240772567 166 # Splat the IV to v16 167 .word 221212759 168 .word 1577072727 169 .word 2817763447 170 # Prepare the ctr pattern into v20 171 # v20: [x, x, x, 0, x, x, x, 1, x, x, x, 2, ...] 172 .word 1342712407 173 # v16:[IV0, IV1, IV2, count+0, IV0, IV1, IV2, count+1, ...] 174 .word 86998743 175 .word 17434711 176 177 178 ##### AES body 179 j 2f 180 1: 181 .word 86998743 182 # Increase ctr in v16. 183 .word 17811543 184 2: 185 # Load plaintext into v20 186 .word 33909255 187 slli t0, t4, 2 188 srli t6, t4, 2 189 sub t5, t5, t4 190 add a0, a0, t0 191 # Prepare the AES ctr input into v24. 192 # The ctr data uses big-endian form. 193 .word 1577585751 194 .word 1233431639 195 196 .word 2786307191 197 .word 2787191927 198 .word 2788240503 199 .word 2789289079 200 .word 2790337655 201 .word 2791386231 202 .word 2792434807 203 .word 2793483383 204 .word 2794531959 205 .word 2795580535 206 .word 2796629111 207 .word 2797677687 208 .word 2798759031 209 210 # ciphertext 211 .word 797576279 212 213 # Store the ciphertext. 214 .word 33942567 215 add a1, a1, t0 216 217 bnez t5, 1b 218 219 ret 220 .size ctr32_encrypt_blocks_192,.-ctr32_encrypt_blocks_192 221 .p2align 3 222 ctr32_encrypt_blocks_256: 223 # Load all 15 round keys to v1-v15 registers. 224 .word 3439489111 225 .word 34005127 226 addi a3, a3, 16 227 .word 34005255 228 addi a3, a3, 16 229 .word 34005383 230 addi a3, a3, 16 231 .word 34005511 232 addi a3, a3, 16 233 .word 34005639 234 addi a3, a3, 16 235 .word 34005767 236 addi a3, a3, 16 237 .word 34005895 238 addi a3, a3, 16 239 .word 34006023 240 addi a3, a3, 16 241 .word 34006151 242 addi a3, a3, 16 243 .word 34006279 244 addi a3, a3, 16 245 .word 34006407 246 addi a3, a3, 16 247 .word 34006535 248 addi a3, a3, 16 249 .word 34006663 250 addi a3, a3, 16 251 .word 34006791 252 addi a3, a3, 16 253 .word 34006919 254 255 # Setup mask into v0 256 # The mask pattern for 4*N-th elements 257 # mask v0: [000100010001....] 258 # Note: 259 # We could setup the mask just for the maximum element length instead of 260 # the VLMAX. 261 li t0, 0b10001000 262 .word 201356247 263 .word 1577238615 264 # Load IV. 265 # v31:[IV0, IV1, IV2, big-endian count] 266 .word 3439489111 267 .word 34041735 268 # Convert the big-endian counter into little-endian. 269 .word 3305271383 270 .word 1240772567 271 # Splat the IV to v16 272 .word 221212759 273 .word 1577072727 274 .word 2817763447 275 # Prepare the ctr pattern into v20 276 # v20: [x, x, x, 0, x, x, x, 1, x, x, x, 2, ...] 277 .word 1342712407 278 # v16:[IV0, IV1, IV2, count+0, IV0, IV1, IV2, count+1, ...] 279 .word 86998743 280 .word 17434711 281 282 283 ##### AES body 284 j 2f 285 1: 286 .word 86998743 287 # Increase ctr in v16. 288 .word 17811543 289 2: 290 # Load plaintext into v20 291 .word 33909255 292 slli t0, t4, 2 293 srli t6, t4, 2 294 sub t5, t5, t4 295 add a0, a0, t0 296 # Prepare the AES ctr input into v24. 297 # The ctr data uses big-endian form. 298 .word 1577585751 299 .word 1233431639 300 301 .word 2786307191 302 .word 2787191927 303 .word 2788240503 304 .word 2789289079 305 .word 2790337655 306 .word 2791386231 307 .word 2792434807 308 .word 2793483383 309 .word 2794531959 310 .word 2795580535 311 .word 2796629111 312 .word 2797677687 313 .word 2798726263 314 .word 2799774839 315 .word 2800856183 316 317 # ciphertext 318 .word 797576279 319 320 # Store the ciphertext. 321 .word 33942567 322 add a1, a1, t0 323 324 bnez t5, 1b 325 326 ret 327 .size ctr32_encrypt_blocks_256,.-ctr32_encrypt_blocks_256 328
Indexes created Sat Feb 28 05:31:39 UTC 2026