1 # $NetBSD: Makefile,v 1.2 2021/05/30 01:56:49 joerg Exp $ 2 3 PROG_CXX= llvm-tblgen 4 NOMAN= yes 5 6 .include <bsd.init.mk> 7 8 .PATH: ${LLVM_SRCDIR}/utils/TableGen 9 10 SRCS= AsmMatcherEmitter.cpp \ 11 AsmWriterEmitter.cpp \ 12 AsmWriterInst.cpp \ 13 Attributes.cpp \ 14 CallingConvEmitter.cpp \ 15 CodeBeadsGen.cpp \ 16 CodeEmitterGen.cpp \ 17 CodeGenDAGPatterns.cpp \ 18 CodeGenHwModes.cpp \ 19 CodeGenInstruction.cpp \ 20 CodeGenMapTable.cpp \ 21 CodeGenRegisters.cpp \ 22 CodeGenSchedule.cpp \ 23 CodeGenTarget.cpp \ 24 CTagsEmitter.cpp \ 25 DAGISelEmitter.cpp \ 26 DAGISelMatcher.cpp \ 27 DAGISelMatcherEmitter.cpp \ 28 DAGISelMatcherGen.cpp \ 29 DAGISelMatcherOpt.cpp \ 30 DFAEmitter.cpp \ 31 DFAPacketizerEmitter.cpp \ 32 DirectiveEmitter.cpp \ 33 DisassemblerEmitter.cpp \ 34 ExegesisEmitter.cpp \ 35 FastISelEmitter.cpp \ 36 FixedLenDecoderEmitter.cpp \ 37 GICombinerEmitter.cpp \ 38 GlobalISelEmitter.cpp \ 39 InfoByHwMode.cpp \ 40 InstrDocsEmitter.cpp \ 41 InstrInfoEmitter.cpp \ 42 IntrinsicEmitter.cpp \ 43 OptEmitter.cpp \ 44 OptParserEmitter.cpp \ 45 OptRSTEmitter.cpp \ 46 PredicateExpander.cpp \ 47 PseudoLoweringEmitter.cpp \ 48 RegisterBankEmitter.cpp \ 49 RegisterInfoEmitter.cpp \ 50 RISCVCompressInstEmitter.cpp \ 51 SDNodeProperties.cpp \ 52 SearchableTableEmitter.cpp \ 53 SubtargetEmitter.cpp \ 54 SubtargetFeatureInfo.cpp \ 55 TableGen.cpp \ 56 Types.cpp \ 57 WebAssemblyDisassemblerEmitter.cpp \ 58 X86DisassemblerTables.cpp \ 59 X86EVEX2VEXTablesEmitter.cpp \ 60 X86FoldTablesEmitter.cpp \ 61 X86ModRMFilters.cpp \ 62 X86RecognizableInstr.cpp 63 64 .PATH: ${LLVM_SRCDIR}/utils/TableGen/GlobalISel 65 SRCS+= CodeExpander.cpp \ 66 GIMatchDag.cpp \ 67 GIMatchDagEdge.cpp \ 68 GIMatchDagInstr.cpp \ 69 GIMatchDagOperands.cpp \ 70 GIMatchDagPredicate.cpp \ 71 GIMatchDagPredicateDependencyEdge.cpp \ 72 GIMatchTree.cpp 73 74 LLVM_LIBS+= \ 75 TableGen \ 76 Support \ 77 Demangle 78 79 .include "${.PARSEDIR}/../../link.mk" 80 81 .include <bsd.prog.mk> 82
Indexes created Fri Apr 24 00:22:58 UTC 2026