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      1 #	$NetBSD: Makefile,v 1.2 2021/05/30 01:56:50 joerg Exp $
      2 
      3 LIB=	LLVMARMCodeGen
      4 
      5 .include <bsd.init.mk>
      6 
      7 CPPFLAGS+=	-I${LLVM_SRCDIR}/lib/Target/ARM
      8 
      9 .PATH: ${LLVM_SRCDIR}/lib/Target/ARM
     10 
     11 SRCS+=	A15SDOptimizer.cpp \
     12 	ARMAsmPrinter.cpp \
     13 	ARMBaseInstrInfo.cpp \
     14 	ARMBaseRegisterInfo.cpp \
     15 	ARMBasicBlockInfo.cpp \
     16 	ARMBlockPlacement.cpp \
     17 	ARMCallingConv.cpp \
     18 	ARMCallLowering.cpp \
     19 	ARMConstantIslandPass.cpp \
     20 	ARMConstantPoolValue.cpp \
     21 	ARMExpandPseudoInsts.cpp \
     22 	ARMFastISel.cpp \
     23 	ARMFrameLowering.cpp \
     24 	ARMHazardRecognizer.cpp \
     25 	ARMInstrInfo.cpp \
     26 	ARMInstructionSelector.cpp \
     27 	ARMISelDAGToDAG.cpp \
     28 	ARMISelLowering.cpp \
     29 	ARMLegalizerInfo.cpp \
     30 	ARMLoadStoreOptimizer.cpp \
     31 	ARMLowOverheadLoops.cpp \
     32 	ARMMachineFunctionInfo.cpp \
     33 	ARMMacroFusion.cpp \
     34 	ARMMCInstLower.cpp \
     35 	ARMOptimizeBarriersPass.cpp \
     36 	ARMParallelDSP.cpp \
     37 	ARMRegisterBankInfo.cpp \
     38 	ARMRegisterInfo.cpp \
     39 	ARMSelectionDAGInfo.cpp \
     40 	ARMSLSHardening.cpp \
     41 	ARMSubtarget.cpp \
     42 	ARMTargetMachine.cpp \
     43 	ARMTargetObjectFile.cpp \
     44 	ARMTargetTransformInfo.cpp \
     45 	MLxExpansionPass.cpp \
     46 	MVEGatherScatterLowering.cpp \
     47 	MVELaneInterleavingPass.cpp \
     48 	MVETailPredication.cpp \
     49 	MVETPAndVPTOptimisationsPass.cpp \
     50 	MVEVPTBlockPass.cpp \
     51 	Thumb1FrameLowering.cpp \
     52 	Thumb1InstrInfo.cpp \
     53 	Thumb2InstrInfo.cpp \
     54 	Thumb2ITBlockPass.cpp \
     55 	Thumb2SizeReduction.cpp \
     56 	ThumbRegisterInfo.cpp
     57 
     58 TABLEGEN_SRC=		ARM.td
     59 TABLEGEN_INCLUDES=	-I${LLVM_SRCDIR}/lib/Target/ARM
     60 TABLEGEN_OUTPUT= \
     61 	ARMGenAsmMatcher.inc|-gen-asm-matcher \
     62 	ARMGenAsmWriter.inc|-gen-asm-writer \
     63 	ARMGenCallingConv.inc|-gen-callingconv \
     64 	ARMGenCodeEmitter.inc|-gen-emitter \
     65 	ARMGenDAGISel.inc|-gen-dag-isel \
     66 	ARMGenDisassemblerTables.inc|-gen-disassembler \
     67 	ARMGenFastISel.inc|-gen-fast-isel \
     68 	ARMGenGlobalISel.inc|-gen-global-isel \
     69 	ARMGenInstrInfo.inc|-gen-instr-info \
     70 	ARMGenMCCodeEmitter.inc|-gen-emitter \
     71 	ARMGenMCPseudoLowering.inc|-gen-pseudo-lowering \
     72 	ARMGenRegisterBank.inc|-gen-register-bank \
     73 	ARMGenRegisterInfo.inc|-gen-register-info \
     74 	ARMGenSubtargetInfo.inc|-gen-subtarget \
     75 	ARMGenSystemRegister.inc|-gen-searchable-tables
     76 
     77 
     78 .include "${.PARSEDIR}/../../tablegen.mk"
     79 
     80 .if defined(HOSTLIB)
     81 .include <bsd.hostlib.mk>
     82 .else
     83 .include <bsd.lib.mk>
     84 .endif
     85