1 /* MIPS ELF support for BFD. 2 Copyright (C) 1993-2025 Free Software Foundation, Inc. 3 4 By Ian Lance Taylor, Cygnus Support, <ian (at) cygnus.com>, from 5 information in the System V Application Binary Interface, MIPS 6 Processor Supplement. 7 8 This file is part of BFD, the Binary File Descriptor library. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 23 MA 02110-1301, USA. */ 24 25 /* This file holds definitions specific to the MIPS ELF ABI. Note 26 that most of this is not actually implemented by BFD. */ 27 28 #ifndef _ELF_MIPS_H 29 #define _ELF_MIPS_H 30 31 #include "elf/reloc-macros.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* Relocation types. */ 38 START_RELOC_NUMBERS (elf_mips_reloc_type) 39 RELOC_NUMBER (R_MIPS_NONE, 0) 40 RELOC_NUMBER (R_MIPS_16, 1) 41 RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */ 42 RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */ 43 RELOC_NUMBER (R_MIPS_26, 4) 44 RELOC_NUMBER (R_MIPS_HI16, 5) 45 RELOC_NUMBER (R_MIPS_LO16, 6) 46 RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */ 47 RELOC_NUMBER (R_MIPS_LITERAL, 8) 48 RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */ 49 RELOC_NUMBER (R_MIPS_PC16, 10) 50 RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */ 51 RELOC_NUMBER (R_MIPS_GPREL32, 12) 52 /* The remaining relocs are defined on Irix, although they are not 53 in the MIPS ELF ABI. */ 54 RELOC_NUMBER (R_MIPS_UNUSED1, 13) 55 RELOC_NUMBER (R_MIPS_UNUSED2, 14) 56 RELOC_NUMBER (R_MIPS_UNUSED3, 15) 57 RELOC_NUMBER (R_MIPS_SHIFT5, 16) 58 RELOC_NUMBER (R_MIPS_SHIFT6, 17) 59 RELOC_NUMBER (R_MIPS_64, 18) 60 RELOC_NUMBER (R_MIPS_GOT_DISP, 19) 61 RELOC_NUMBER (R_MIPS_GOT_PAGE, 20) 62 RELOC_NUMBER (R_MIPS_GOT_OFST, 21) 63 RELOC_NUMBER (R_MIPS_GOT_HI16, 22) 64 RELOC_NUMBER (R_MIPS_GOT_LO16, 23) 65 RELOC_NUMBER (R_MIPS_SUB, 24) 66 RELOC_NUMBER (R_MIPS_INSERT_A, 25) 67 RELOC_NUMBER (R_MIPS_INSERT_B, 26) 68 RELOC_NUMBER (R_MIPS_DELETE, 27) 69 RELOC_NUMBER (R_MIPS_HIGHER, 28) 70 RELOC_NUMBER (R_MIPS_HIGHEST, 29) 71 RELOC_NUMBER (R_MIPS_CALL_HI16, 30) 72 RELOC_NUMBER (R_MIPS_CALL_LO16, 31) 73 RELOC_NUMBER (R_MIPS_SCN_DISP, 32) 74 RELOC_NUMBER (R_MIPS_REL16, 33) 75 RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34) 76 RELOC_NUMBER (R_MIPS_PJUMP, 35) 77 RELOC_NUMBER (R_MIPS_RELGOT, 36) 78 RELOC_NUMBER (R_MIPS_JALR, 37) 79 /* TLS relocations. */ 80 RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38) 81 RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39) 82 RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40) 83 RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41) 84 RELOC_NUMBER (R_MIPS_TLS_GD, 42) 85 RELOC_NUMBER (R_MIPS_TLS_LDM, 43) 86 RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44) 87 RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45) 88 RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46) 89 RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47) 90 RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48) 91 RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49) 92 RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50) 93 RELOC_NUMBER (R_MIPS_GLOB_DAT, 51) 94 /* Space to grow */ 95 RELOC_NUMBER (R_MIPS_PC21_S2, 60) 96 RELOC_NUMBER (R_MIPS_PC26_S2, 61) 97 RELOC_NUMBER (R_MIPS_PC18_S3, 62) 98 RELOC_NUMBER (R_MIPS_PC19_S2, 63) 99 RELOC_NUMBER (R_MIPS_PCHI16, 64) 100 RELOC_NUMBER (R_MIPS_PCLO16, 65) 101 FAKE_RELOC (R_MIPS_max, 66) 102 /* These relocs are used for the mips16. */ 103 FAKE_RELOC (R_MIPS16_min, 100) 104 RELOC_NUMBER (R_MIPS16_26, 100) 105 RELOC_NUMBER (R_MIPS16_GPREL, 101) 106 RELOC_NUMBER (R_MIPS16_GOT16, 102) 107 RELOC_NUMBER (R_MIPS16_CALL16, 103) 108 RELOC_NUMBER (R_MIPS16_HI16, 104) 109 RELOC_NUMBER (R_MIPS16_LO16, 105) 110 RELOC_NUMBER (R_MIPS16_TLS_GD, 106) 111 RELOC_NUMBER (R_MIPS16_TLS_LDM, 107) 112 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108) 113 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109) 114 RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110) 115 RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111) 116 RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112) 117 RELOC_NUMBER (R_MIPS16_PC16_S1, 113) 118 FAKE_RELOC (R_MIPS16_max, 114) 119 /* These relocations are specific to VxWorks. */ 120 RELOC_NUMBER (R_MIPS_COPY, 126) 121 RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127) 122 123 /* These relocations are specific to microMIPS. */ 124 FAKE_RELOC (R_MICROMIPS_min, 130) 125 RELOC_NUMBER (R_MICROMIPS_26_S1, 133) 126 RELOC_NUMBER (R_MICROMIPS_HI16, 134) 127 RELOC_NUMBER (R_MICROMIPS_LO16, 135) 128 RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64: 129 alias R_MICROMIPS_GPREL */ 130 RELOC_NUMBER (R_MICROMIPS_LITERAL, 137) 131 RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64: 132 alias R_MICROMIPS_GOT */ 133 RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139) 134 RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140) 135 RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141) 136 RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64: 137 alias R_MICROMIPS_CALL */ 138 RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145) 139 RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146) 140 RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147) 141 RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148) 142 RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149) 143 RELOC_NUMBER (R_MICROMIPS_SUB, 150) 144 RELOC_NUMBER (R_MICROMIPS_HIGHER, 151) 145 RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152) 146 RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153) 147 RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154) 148 RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155) 149 RELOC_NUMBER (R_MICROMIPS_JALR, 156) 150 RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157) 151 /* TLS relocations. */ 152 RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162) 153 RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163) 154 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164) 155 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165) 156 RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166) 157 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169) 158 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170) 159 /* microMIPS GP- and PC-relative relocations. */ 160 RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172) 161 RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173) 162 FAKE_RELOC (R_MICROMIPS_max, 174) 163 164 /* This was a GNU extension used by embedded-PIC. It was co-opted by 165 mips-linux for exception-handling data. GCC stopped using it in 166 May, 2004, then started using it again for compact unwind tables. */ 167 RELOC_NUMBER (R_MIPS_PC32, 248) 168 RELOC_NUMBER (R_MIPS_EH, 249) 169 /* FIXME: this relocation is used internally by gas. */ 170 RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250) 171 /* These are GNU extensions to enable C++ vtable garbage collection. */ 172 RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253) 173 RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254) 174 END_RELOC_NUMBERS (R_MIPS_maxext) 175 176 /* Processor specific flags for the ELF header e_flags field. */ 177 178 /* At least one .noreorder directive appears in the source. */ 179 #define EF_MIPS_NOREORDER 0x00000001 180 181 /* File contains position independent code. */ 182 #define EF_MIPS_PIC 0x00000002 183 184 /* Code in file uses the standard calling sequence for calling 185 position independent code. */ 186 #define EF_MIPS_CPIC 0x00000004 187 188 /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */ 189 #define EF_MIPS_XGOT 0x00000008 190 191 /* Code in file uses UCODE (obsolete) */ 192 #define EF_MIPS_UCODE 0x00000010 193 194 /* Code in file uses new ABI (-n32 on Irix 6). */ 195 #define EF_MIPS_ABI2 0x00000020 196 197 /* Process the .MIPS.options section first by ld */ 198 #define EF_MIPS_OPTIONS_FIRST 0x00000080 199 200 /* Indicates code compiled for a 64-bit machine in 32-bit mode 201 (regs are 32-bits wide). */ 202 #define EF_MIPS_32BITMODE 0x00000100 203 204 /* 32-bit machine but FP registers are 64 bit (-mfp64). */ 205 #define EF_MIPS_FP64 0x00000200 206 207 /* Code in file uses the IEEE 754-2008 NaN encoding convention. */ 208 #define EF_MIPS_NAN2008 0x00000400 209 210 /* Architectural Extensions used by this file */ 211 #define EF_MIPS_ARCH_ASE 0x0f000000 212 213 /* Use MDMX multimedia extensions */ 214 #define EF_MIPS_ARCH_ASE_MDMX 0x08000000 215 216 /* Use MIPS-16 ISA extensions */ 217 #define EF_MIPS_ARCH_ASE_M16 0x04000000 218 219 /* Use MICROMIPS ISA extensions. */ 220 #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 221 222 /* Four bit MIPS architecture field. */ 223 #define EF_MIPS_ARCH 0xf0000000 224 225 /* -mips1 code. */ 226 #define EF_MIPS_ARCH_1 0x00000000 227 228 /* -mips2 code. */ 229 #define EF_MIPS_ARCH_2 0x10000000 230 231 /* -mips3 code. */ 232 #define EF_MIPS_ARCH_3 0x20000000 233 234 /* -mips4 code. */ 235 #define EF_MIPS_ARCH_4 0x30000000 236 237 /* -mips5 code. */ 238 #define EF_MIPS_ARCH_5 0x40000000 239 240 /* -mips32 code. */ 241 #define EF_MIPS_ARCH_32 0x50000000 242 243 /* -mips64 code. */ 244 #define EF_MIPS_ARCH_64 0x60000000 245 246 /* -mips32r2 code. */ 247 #define EF_MIPS_ARCH_32R2 0x70000000 248 249 /* -mips64r2 code. */ 250 #define EF_MIPS_ARCH_64R2 0x80000000 251 252 /* -mips32r6 code. */ 253 #define EF_MIPS_ARCH_32R6 0x90000000 254 255 /* -mips64r6 code. */ 256 #define EF_MIPS_ARCH_64R6 0xa0000000 257 258 /* The ABI of the file. Also see EF_MIPS_ABI2 above. */ 259 #define EF_MIPS_ABI 0x0000F000 260 261 /* The original o32 abi. */ 262 #define EF_MIPS_ABI_O32 0x00001000 263 264 /* O32 extended to work on 64 bit architectures */ 265 #define EF_MIPS_ABI_O64 0x00002000 266 267 /* EABI in 32 bit mode */ 268 #define EF_MIPS_ABI_EABI32 0x00003000 269 270 /* EABI in 64 bit mode */ 271 #define EF_MIPS_ABI_EABI64 0x00004000 272 273 /* In order to support backwards compatibility we also 274 define the old versions of some of these constants. */ 275 #define E_MIPS_ARCH_1 EF_MIPS_ARCH_1 276 #define E_MIPS_ARCH_2 EF_MIPS_ARCH_2 277 #define E_MIPS_ARCH_3 EF_MIPS_ARCH_3 278 #define E_MIPS_ARCH_4 EF_MIPS_ARCH_4 279 #define E_MIPS_ARCH_5 EF_MIPS_ARCH_5 280 #define E_MIPS_ARCH_32 EF_MIPS_ARCH_32 281 #define E_MIPS_ARCH_64 EF_MIPS_ARCH_64 282 #define E_MIPS_ARCH_32R2 EF_MIPS_ARCH_32R2 283 #define E_MIPS_ARCH_64R2 EF_MIPS_ARCH_64R2 284 #define E_MIPS_ARCH_32R6 EF_MIPS_ARCH_32R6 285 #define E_MIPS_ARCH_64R6 EF_MIPS_ARCH_64R6 286 #define E_MIPS_ABI_O32 EF_MIPS_ABI_O32 287 #define E_MIPS_ABI_O64 EF_MIPS_ABI_O64 288 #define E_MIPS_ABI_EABI32 EF_MIPS_ABI_EABI32 289 #define E_MIPS_ABI_EABI64 EF_MIPS_ABI_EABI64 290 291 292 /* Machine variant if we know it. This field was invented at Cygnus, 293 but it is hoped that other vendors will adopt it. If some standard 294 is developed, this code should be changed to follow it. */ 295 296 #define EF_MIPS_MACH 0x00FF0000 297 298 /* Cygnus is choosing values between 80 and 9F; 299 00 - 7F should be left for a future standard; 300 the rest are open. */ 301 302 #define EF_MIPS_MACH_3900 0x00810000 303 #define EF_MIPS_MACH_4010 0x00820000 304 #define EF_MIPS_MACH_4100 0x00830000 305 #define EF_MIPS_MACH_ALLEGREX 0x00840000 306 #define EF_MIPS_MACH_4650 0x00850000 307 #define EF_MIPS_MACH_4120 0x00870000 308 #define EF_MIPS_MACH_4111 0x00880000 309 #define EF_MIPS_MACH_SB1 0x008a0000 310 #define EF_MIPS_MACH_OCTEON 0x008b0000 311 #define EF_MIPS_MACH_XLR 0x008c0000 312 #define EF_MIPS_MACH_OCTEON2 0x008d0000 313 #define EF_MIPS_MACH_OCTEON3 0x008e0000 314 #define EF_MIPS_MACH_5400 0x00910000 315 #define EF_MIPS_MACH_5900 0x00920000 316 #define EF_MIPS_MACH_IAMR2 0x00930000 317 #define EF_MIPS_MACH_5500 0x00980000 318 #define EF_MIPS_MACH_9000 0x00990000 319 #define EF_MIPS_MACH_LS2E 0x00A00000 320 #define EF_MIPS_MACH_LS2F 0x00A10000 321 #define EF_MIPS_MACH_GS464 0x00A20000 322 #define EF_MIPS_MACH_GS464E 0x00A30000 323 #define EF_MIPS_MACH_GS264E 0x00A40000 324 325 /* In order to support backwards compatibility we also 326 define the old versions of some of these constants. */ 327 #define E_MIPS_MACH_3900 EF_MIPS_MACH_3900 328 #define E_MIPS_MACH_4010 EF_MIPS_MACH_4010 329 #define E_MIPS_MACH_4100 EF_MIPS_MACH_4100 330 #define E_MIPS_MACH_ALLEGREX EF_MIPS_MACH_ALLEGREX 331 #define E_MIPS_MACH_4650 EF_MIPS_MACH_4650 332 #define E_MIPS_MACH_4120 EF_MIPS_MACH_4120 333 #define E_MIPS_MACH_4111 EF_MIPS_MACH_4111 334 #define E_MIPS_MACH_SB1 EF_MIPS_MACH_SB1 335 #define E_MIPS_MACH_OCTEON EF_MIPS_MACH_OCTEON 336 #define E_MIPS_MACH_XLR EF_MIPS_MACH_XLR 337 #define E_MIPS_MACH_OCTEON2 EF_MIPS_MACH_OCTEON2 338 #define E_MIPS_MACH_OCTEON3 EF_MIPS_MACH_OCTEON3 339 #define E_MIPS_MACH_5400 EF_MIPS_MACH_5400 340 #define E_MIPS_MACH_5900 EF_MIPS_MACH_5900 341 #define E_MIPS_MACH_IAMR2 EF_MIPS_MACH_IAMR2 342 #define E_MIPS_MACH_5500 EF_MIPS_MACH_5500 343 #define E_MIPS_MACH_9000 EF_MIPS_MACH_9000 344 #define E_MIPS_MACH_LS2E EF_MIPS_MACH_LS2E 345 #define E_MIPS_MACH_LS2F EF_MIPS_MACH_LS2F 346 #define E_MIPS_MACH_GS464 EF_MIPS_MACH_GS464 347 #define E_MIPS_MACH_GS464E EF_MIPS_MACH_GS464E 348 #define E_MIPS_MACH_GS264E EF_MIPS_MACH_GS264E 349 350 /* Processor specific section indices. These sections do not actually 351 exist. Symbols with a st_shndx field corresponding to one of these 352 values have a special meaning. */ 353 354 /* Defined and allocated common symbol. Value is virtual address. If 355 relocated, alignment must be preserved. */ 356 #define SHN_MIPS_ACOMMON SHN_LORESERVE 357 358 /* Defined and allocated text symbol. Value is virtual address. 359 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ 360 #define SHN_MIPS_TEXT (SHN_LORESERVE + 1) 361 362 /* Defined and allocated data symbol. Value is virtual address. 363 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ 364 #define SHN_MIPS_DATA (SHN_LORESERVE + 2) 365 366 /* Small common symbol. */ 367 #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3) 368 369 /* Small undefined symbol. */ 370 #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4) 371 372 /* Processor specific section types. */ 374 375 /* Section contains the set of dynamic shared objects used when 376 statically linking. */ 377 #define SHT_MIPS_LIBLIST (SHT_LOPROC + 0) 378 379 /* I'm not sure what this is, but it's used on Irix 5. */ 380 #define SHT_MIPS_MSYM (SHT_LOPROC + 1) 381 382 /* Section contains list of symbols whose definitions conflict with 383 symbols defined in shared objects. */ 384 #define SHT_MIPS_CONFLICT (SHT_LOPROC + 2) 385 386 /* Section contains the global pointer table. */ 387 #define SHT_MIPS_GPTAB (SHT_LOPROC + 3) 388 389 /* Section contains microcode information. The exact format is 390 unspecified. */ 391 #define SHT_MIPS_UCODE (SHT_LOPROC + 4) 392 393 /* Section contains some sort of debugging information. The exact 394 format is unspecified. It's probably ECOFF symbols. */ 395 #define SHT_MIPS_DEBUG (SHT_LOPROC + 5) 396 397 /* Section contains register usage information. */ 398 #define SHT_MIPS_REGINFO (SHT_LOPROC + 6) 399 400 /* ??? */ 401 #define SHT_MIPS_PACKAGE (SHT_LOPROC + 7) 402 403 /* ??? */ 404 #define SHT_MIPS_PACKSYM (SHT_LOPROC + 8) 405 406 /* ??? */ 407 #define SHT_MIPS_RELD (SHT_LOPROC + 9) 408 409 /* Note: SHT_LOPROC + 0xa is missing... */ 410 411 /* Section contains interface information. */ 412 #define SHT_MIPS_IFACE (SHT_LOPROC + 0xb) 413 414 /* Section contains description of contents of another section. */ 415 #define SHT_MIPS_CONTENT (SHT_LOPROC + 0xc) 416 417 /* Section contains miscellaneous options. */ 418 #define SHT_MIPS_OPTIONS (SHT_LOPROC + 0xd) 419 420 /* Note: SHT_LOPROC + 0xe is missing... */ 421 /* Note: SHT_LOPROC + 0xf is missing... */ 422 423 /* ??? */ 424 #define SHT_MIPS_SHDR (SHT_LOPROC + 0x10) 425 426 /* ??? */ 427 #define SHT_MIPS_FDESC (SHT_LOPROC + 0x11) 428 429 /* ??? */ 430 #define SHT_MIPS_EXTSYM (SHT_LOPROC + 0x12) 431 432 /* ??? */ 433 #define SHT_MIPS_DENSE (SHT_LOPROC + 0x13) 434 435 /* ??? */ 436 #define SHT_MIPS_PDESC (SHT_LOPROC + 0x14) 437 438 /* ??? */ 439 #define SHT_MIPS_LOCSYM (SHT_LOPROC + 0x15) 440 441 /* ??? */ 442 #define SHT_MIPS_AUXSYM (SHT_LOPROC + 0x16) 443 444 /* ??? */ 445 #define SHT_MIPS_OPTSYM (SHT_LOPROC + 0x17) 446 447 /* ??? */ 448 #define SHT_MIPS_LOCSTR (SHT_LOPROC + 0x18) 449 450 /* ??? */ 451 #define SHT_MIPS_LINE (SHT_LOPROC + 0x19) 452 453 /* ??? */ 454 #define SHT_MIPS_RFDESC (SHT_LOPROC + 0x1a) 455 456 /* Delta C++: symbol table */ 457 #define SHT_MIPS_DELTASYM (SHT_LOPROC + 0x1b) 458 459 /* Delta C++: instance table */ 460 #define SHT_MIPS_DELTAINST (SHT_LOPROC + 0x1c) 461 462 /* Delta C++: class table */ 463 #define SHT_MIPS_DELTACLASS (SHT_LOPROC + 0x1d) 464 465 /* DWARF debugging section. */ 466 #define SHT_MIPS_DWARF (SHT_LOPROC + 0x1e) 467 468 /* Delta C++: declarations */ 469 #define SHT_MIPS_DELTADECL (SHT_LOPROC + 0x1f) 470 471 /* List of libraries the binary depends on. Includes a time stamp, version 472 number. */ 473 #define SHT_MIPS_SYMBOL_LIB (SHT_LOPROC + 0x20) 474 475 /* Events section. */ 476 #define SHT_MIPS_EVENTS (SHT_LOPROC + 0x21) 477 478 /* ??? */ 479 #define SHT_MIPS_TRANSLATE (SHT_LOPROC + 0x22) 480 481 /* Special pixie sections */ 482 #define SHT_MIPS_PIXIE (SHT_LOPROC + 0x23) 483 484 /* Address translation table (for debug info) */ 485 #define SHT_MIPS_XLATE (SHT_LOPROC + 0x24) 486 487 /* SGI internal address translation table (for debug info) */ 488 #define SHT_MIPS_XLATE_DEBUG (SHT_LOPROC + 0x25) 489 490 /* Intermediate code */ 491 #define SHT_MIPS_WHIRL (SHT_LOPROC + 0x26) 492 493 /* C++ exception handling region info */ 494 #define SHT_MIPS_EH_REGION (SHT_LOPROC + 0x27) 495 496 /* Obsolete address translation table (for debug info) */ 497 #define SHT_MIPS_XLATE_OLD (SHT_LOPROC + 0x28) 498 499 /* Runtime procedure descriptor table exception information (ucode) ??? */ 500 #define SHT_MIPS_PDR_EXCEPTION (SHT_LOPROC + 0x29) 501 502 /* ABI related flags section. */ 503 #define SHT_MIPS_ABIFLAGS (SHT_LOPROC + 0x2a) 504 505 /* GNU style symbol hash table with xlat. */ 506 #define SHT_MIPS_XHASH (SHT_LOPROC + 0x2b) 507 508 /* A section of type SHT_MIPS_LIBLIST contains an array of the 509 following structure. The sh_link field is the section index of the 510 string table. The sh_info field is the number of entries in the 511 section. */ 512 typedef struct 513 { 514 /* String table index for name of shared object. */ 515 unsigned long l_name; 516 /* Time stamp. */ 517 unsigned long l_time_stamp; 518 /* Checksum of symbol names and common sizes. */ 519 unsigned long l_checksum; 520 /* String table index for version. */ 521 unsigned long l_version; 522 /* Flags. */ 523 unsigned long l_flags; 524 } Elf32_Lib; 525 526 /* The external version of Elf32_Lib. */ 527 typedef struct 528 { 529 unsigned char l_name[4]; 530 unsigned char l_time_stamp[4]; 531 unsigned char l_checksum[4]; 532 unsigned char l_version[4]; 533 unsigned char l_flags[4]; 534 } Elf32_External_Lib; 535 536 /* The l_flags field of an Elf32_Lib structure may contain the 537 following flags. */ 538 539 /* Require an exact match at runtime. */ 540 #define LL_EXACT_MATCH 0x00000001 541 542 /* Ignore version incompatibilities at runtime. */ 543 #define LL_IGNORE_INT_VER 0x00000002 544 545 /* Require matching minor version number. */ 546 #define LL_REQUIRE_MINOR 0x00000004 547 548 /* ??? */ 549 #define LL_EXPORTS 0x00000008 550 551 /* Delay loading of this library until really needed. */ 552 #define LL_DELAY_LOAD 0x00000010 553 554 /* ??? Delta C++ stuff ??? */ 555 #define LL_DELTA 0x00000020 556 557 558 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the 559 .dynsym section. Each element has the following type. */ 560 typedef unsigned long Elf32_Conflict; 561 typedef unsigned char Elf32_External_Conflict[4]; 562 563 typedef unsigned long Elf64_Conflict; 564 typedef unsigned char Elf64_External_Conflict[8]; 565 566 /* A section of type SHT_MIPS_GPTAB contains information about how 567 much GP space would be required for different -G arguments. This 568 information is only used so that the linker can provide informative 569 suggestions as to the best -G value to use. The sh_info field is 570 the index of the section for which this information applies. The 571 contents of the section are an array of the following union. The 572 first element uses the gt_header field. The remaining elements use 573 the gt_entry field. */ 574 typedef union 575 { 576 struct 577 { 578 /* -G value actually used for this object file. */ 579 unsigned long gt_current_g_value; 580 /* Unused. */ 581 unsigned long gt_unused; 582 } gt_header; 583 struct 584 { 585 /* If this -G argument has been used... */ 586 unsigned long gt_g_value; 587 /* ...this many GP section bytes would be required. */ 588 unsigned long gt_bytes; 589 } gt_entry; 590 } Elf32_gptab; 591 592 /* The external version of Elf32_gptab. */ 593 594 typedef union 595 { 596 struct 597 { 598 unsigned char gt_current_g_value[4]; 599 unsigned char gt_unused[4]; 600 } gt_header; 601 struct 602 { 603 unsigned char gt_g_value[4]; 604 unsigned char gt_bytes[4]; 605 } gt_entry; 606 } Elf32_External_gptab; 607 608 /* A section of type SHT_MIPS_REGINFO contains the following 609 structure. */ 610 typedef struct 611 { 612 /* Mask of general purpose registers used. */ 613 uint32_t ri_gprmask; 614 /* Mask of co-processor registers used. */ 615 uint32_t ri_cprmask[4]; 616 /* GP register value for this object file. */ 617 uint32_t ri_gp_value; 618 } Elf32_RegInfo; 619 620 /* The external version of the Elf_RegInfo structure. */ 621 typedef struct 622 { 623 unsigned char ri_gprmask[4]; 624 unsigned char ri_cprmask[4][4]; 625 unsigned char ri_gp_value[4]; 626 } Elf32_External_RegInfo; 627 628 /* MIPS ELF .reginfo swapping routines. */ 629 extern void bfd_mips_elf32_swap_reginfo_in 630 (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *); 631 extern void bfd_mips_elf32_swap_reginfo_out 632 (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *); 633 634 /* Processor specific section flags. */ 636 637 /* This section must be in the global data area. */ 638 #define SHF_MIPS_GPREL 0x10000000 639 640 /* This section should be merged. */ 641 #define SHF_MIPS_MERGE 0x20000000 642 643 /* This section contains address data of size implied by section 644 element size. */ 645 #define SHF_MIPS_ADDR 0x40000000 646 647 /* This section contains string data. */ 648 #define SHF_MIPS_STRING 0x80000000 649 650 /* This section may not be stripped. */ 651 #define SHF_MIPS_NOSTRIP 0x08000000 652 653 /* This section is local to threads. */ 654 #define SHF_MIPS_LOCAL 0x04000000 655 656 /* Linker should generate implicit weak names for this section. */ 657 #define SHF_MIPS_NAMES 0x02000000 658 659 /* Section contais text/data which may be replicated in other sections. 660 Linker should retain only one copy. */ 661 #define SHF_MIPS_NODUPES 0x01000000 662 663 /* Processor specific program header types. */ 665 666 /* Register usage information. Identifies one .reginfo section. */ 667 #define PT_MIPS_REGINFO 0x70000000 668 669 /* Runtime procedure table. */ 670 #define PT_MIPS_RTPROC 0x70000001 671 672 /* .MIPS.options section. */ 673 #define PT_MIPS_OPTIONS 0x70000002 674 675 /* Records ABI related flags. */ 676 #define PT_MIPS_ABIFLAGS 0x70000003 677 678 /* Processor specific dynamic array tags. */ 680 681 /* 32 bit version number for runtime linker interface. */ 682 #define DT_MIPS_RLD_VERSION 0x70000001 683 684 /* Time stamp. */ 685 #define DT_MIPS_TIME_STAMP 0x70000002 686 687 /* Checksum of external strings and common sizes. */ 688 #define DT_MIPS_ICHECKSUM 0x70000003 689 690 /* Index of version string in string table. */ 691 #define DT_MIPS_IVERSION 0x70000004 692 693 /* 32 bits of flags. */ 694 #define DT_MIPS_FLAGS 0x70000005 695 696 /* Base address of the segment. */ 697 #define DT_MIPS_BASE_ADDRESS 0x70000006 698 699 /* ??? */ 700 #define DT_MIPS_MSYM 0x70000007 701 702 /* Address of .conflict section. */ 703 #define DT_MIPS_CONFLICT 0x70000008 704 705 /* Address of .liblist section. */ 706 #define DT_MIPS_LIBLIST 0x70000009 707 708 /* Number of local global offset table entries. */ 709 #define DT_MIPS_LOCAL_GOTNO 0x7000000a 710 711 /* Number of entries in the .conflict section. */ 712 #define DT_MIPS_CONFLICTNO 0x7000000b 713 714 /* Number of entries in the .liblist section. */ 715 #define DT_MIPS_LIBLISTNO 0x70000010 716 717 /* Number of entries in the .dynsym section. */ 718 #define DT_MIPS_SYMTABNO 0x70000011 719 720 /* Index of first external dynamic symbol not referenced locally. */ 721 #define DT_MIPS_UNREFEXTNO 0x70000012 722 723 /* Index of first dynamic symbol in global offset table. */ 724 #define DT_MIPS_GOTSYM 0x70000013 725 726 /* Number of page table entries in global offset table. */ 727 #define DT_MIPS_HIPAGENO 0x70000014 728 729 /* Address of run time loader map, used for debugging. */ 730 #define DT_MIPS_RLD_MAP 0x70000016 731 732 /* Delta C++ class definition. */ 733 #define DT_MIPS_DELTA_CLASS 0x70000017 734 735 /* Number of entries in DT_MIPS_DELTA_CLASS. */ 736 #define DT_MIPS_DELTA_CLASS_NO 0x70000018 737 738 /* Delta C++ class instances. */ 739 #define DT_MIPS_DELTA_INSTANCE 0x70000019 740 741 /* Number of entries in DT_MIPS_DELTA_INSTANCE. */ 742 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a 743 744 /* Delta relocations. */ 745 #define DT_MIPS_DELTA_RELOC 0x7000001b 746 747 /* Number of entries in DT_MIPS_DELTA_RELOC. */ 748 #define DT_MIPS_DELTA_RELOC_NO 0x7000001c 749 750 /* Delta symbols that Delta relocations refer to. */ 751 #define DT_MIPS_DELTA_SYM 0x7000001d 752 753 /* Number of entries in DT_MIPS_DELTA_SYM. */ 754 #define DT_MIPS_DELTA_SYM_NO 0x7000001e 755 756 /* Delta symbols that hold class declarations. */ 757 #define DT_MIPS_DELTA_CLASSSYM 0x70000020 758 759 /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */ 760 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 761 762 /* Flags indicating information about C++ flavor. */ 763 #define DT_MIPS_CXX_FLAGS 0x70000022 764 765 /* Pixie information (???). */ 766 #define DT_MIPS_PIXIE_INIT 0x70000023 767 768 /* Address of .MIPS.symlib */ 769 #define DT_MIPS_SYMBOL_LIB 0x70000024 770 771 /* The GOT index of the first PTE for a segment */ 772 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 773 774 /* The GOT index of the first PTE for a local symbol */ 775 #define DT_MIPS_LOCAL_GOTIDX 0x70000026 776 777 /* The GOT index of the first PTE for a hidden symbol */ 778 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027 779 780 /* The GOT index of the first PTE for a protected symbol */ 781 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028 782 783 /* Address of `.MIPS.options'. */ 784 #define DT_MIPS_OPTIONS 0x70000029 785 786 /* Address of `.interface'. */ 787 #define DT_MIPS_INTERFACE 0x7000002a 788 789 /* ??? */ 790 #define DT_MIPS_DYNSTR_ALIGN 0x7000002b 791 792 /* Size of the .interface section. */ 793 #define DT_MIPS_INTERFACE_SIZE 0x7000002c 794 795 /* Size of rld_text_resolve function stored in the GOT. */ 796 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d 797 798 /* Default suffix of DSO to be added by rld on dlopen() calls. */ 799 #define DT_MIPS_PERF_SUFFIX 0x7000002e 800 801 /* Size of compact relocation section (O32). */ 802 #define DT_MIPS_COMPACT_SIZE 0x7000002f 803 804 /* GP value for auxiliary GOTs. */ 805 #define DT_MIPS_GP_VALUE 0x70000030 806 807 /* Address of auxiliary .dynamic. */ 808 #define DT_MIPS_AUX_DYNAMIC 0x70000031 809 810 /* Address of the base of the PLTGOT. */ 811 #define DT_MIPS_PLTGOT 0x70000032 812 813 /* Points to the base of a writable PLT. */ 814 #define DT_MIPS_RWPLT 0x70000034 815 816 /* Relative offset of run time loader map, used for debugging. */ 817 #define DT_MIPS_RLD_MAP_REL 0x70000035 818 819 /* Address of .MIPS.xhash section. */ 820 #define DT_MIPS_XHASH 0x70000036 821 822 /* Flags which may appear in a DT_MIPS_FLAGS entry. */ 824 825 /* No flags. */ 826 #define RHF_NONE 0x00000000 827 828 /* Uses shortcut pointers. */ 829 #define RHF_QUICKSTART 0x00000001 830 831 /* Hash size is not a power of two. */ 832 #define RHF_NOTPOT 0x00000002 833 834 /* Ignore LD_LIBRARY_PATH. */ 835 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004 836 837 /* DSO address may not be relocated. */ 838 #define RHF_NO_MOVE 0x00000008 839 840 /* SGI specific features. */ 841 #define RHF_SGI_ONLY 0x00000010 842 843 /* Guarantee that .init will finish executing before any non-init 844 code in DSO is called. */ 845 #define RHF_GUARANTEE_INIT 0x00000020 846 847 /* Contains Delta C++ code. */ 848 #define RHF_DELTA_C_PLUS_PLUS 0x00000040 849 850 /* Guarantee that .init will start executing before any non-init 851 code in DSO is called. */ 852 #define RHF_GUARANTEE_START_INIT 0x00000080 853 854 /* Generated by pixie. */ 855 #define RHF_PIXIE 0x00000100 856 857 /* Delay-load DSO by default. */ 858 #define RHF_DEFAULT_DELAY_LOAD 0x00000200 859 860 /* Object may be requickstarted */ 861 #define RHF_REQUICKSTART 0x00000400 862 863 /* Object has been requickstarted */ 864 #define RHF_REQUICKSTARTED 0x00000800 865 866 /* Generated by cord. */ 867 #define RHF_CORD 0x00001000 868 869 /* Object contains no unresolved undef symbols. */ 870 #define RHF_NO_UNRES_UNDEF 0x00002000 871 872 /* Symbol table is in a safe order. */ 873 #define RHF_RLD_ORDER_SAFE 0x00004000 874 875 /* Special values for the st_other field in the symbol table. These 877 are used in an Irix 5 dynamic symbol table. */ 878 879 #define STO_DEFAULT STV_DEFAULT 880 #define STO_INTERNAL STV_INTERNAL 881 #define STO_HIDDEN STV_HIDDEN 882 #define STO_PROTECTED STV_PROTECTED 883 884 /* Two topmost bits denote the MIPS ISA for .text symbols: 885 + 00 -- standard MIPS code, 886 + 10 -- microMIPS code, 887 + 11 -- MIPS16 code; requires the following two bits to be set too. 888 Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below 889 for details. */ 890 #define STO_MIPS_ISA (3 << 6) 891 892 /* The mask spanning the rest of MIPS psABI flags. At most one is expected 893 to be set except for STO_MIPS16. */ 894 #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1))) 895 896 /* The MIPS psABI was updated in 2008 with support for PLTs and copy 897 relocs. There are therefore two types of nonzero SHN_UNDEF functions: 898 PLT entries and traditional MIPS lazy binding stubs. We mark the former 899 with STO_MIPS_PLT to distinguish them from the latter. */ 900 #define STO_MIPS_PLT 0x8 901 #define ELF_ST_IS_MIPS_PLT(other) \ 902 ((ELF_ST_IS_MIPS16 (other) \ 903 ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \ 904 : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT) 905 #define ELF_ST_SET_MIPS_PLT(other) \ 906 ((ELF_ST_IS_MIPS16 (other) \ 907 ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \ 908 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT) 909 910 /* This value is used to mark PIC functions in an object that mixes 911 PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, 912 although MIPS16 symbols are never considered to be MIPS_PIC. */ 913 #define STO_MIPS_PIC 0x20 914 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC) 915 #define ELF_ST_SET_MIPS_PIC(other) \ 916 ((ELF_ST_IS_MIPS16 (other) \ 917 ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \ 918 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC) 919 920 /* This value is used for a mips16 .text symbol. */ 921 #define STO_MIPS16 0xf0 922 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16) 923 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16) 924 925 /* This value is used for a microMIPS .text symbol. To distinguish from 926 STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The 927 mask is STO_MIPS_ISA. */ 928 #define STO_MICROMIPS (2 << 6) 929 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS) 930 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS) 931 932 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs) 933 has been indicated for a .text symbol. */ 934 #define ELF_ST_IS_COMPRESSED(other) \ 935 (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other)) 936 937 /* This bit is used on Irix to indicate a symbol whose definition 938 is optional - if, at final link time, it cannot be found, no 939 error message should be produced. */ 940 #define STO_OPTIONAL (1 << 2) 941 /* A macro to examine the STO_OPTIONAL bit. */ 942 #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL) 943 944 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each 946 relocation entry specifies up to three actual relocations, all at 947 the same address. The first relocation which required a symbol 948 uses the symbol in the r_sym field. The second relocation which 949 requires a symbol uses the symbol in the r_ssym field. If all 950 three relocations require a symbol, the third one uses a zero 951 value. */ 952 953 /* An entry in a 64 bit SHT_REL section. */ 954 955 typedef struct 956 { 957 /* Address of relocation. */ 958 unsigned char r_offset[8]; 959 /* Symbol index. */ 960 unsigned char r_sym[4]; 961 /* Special symbol. */ 962 unsigned char r_ssym[1]; 963 /* Third relocation. */ 964 unsigned char r_type3[1]; 965 /* Second relocation. */ 966 unsigned char r_type2[1]; 967 /* First relocation. */ 968 unsigned char r_type[1]; 969 } Elf64_Mips_External_Rel; 970 971 typedef struct 972 { 973 /* Address of relocation. */ 974 bfd_vma r_offset; 975 /* Symbol index. */ 976 unsigned long r_sym; 977 /* Special symbol. */ 978 unsigned char r_ssym; 979 /* Third relocation. */ 980 unsigned char r_type3; 981 /* Second relocation. */ 982 unsigned char r_type2; 983 /* First relocation. */ 984 unsigned char r_type; 985 } Elf64_Mips_Internal_Rel; 986 987 /* An entry in a 64 bit SHT_RELA section. */ 988 989 typedef struct 990 { 991 /* Address of relocation. */ 992 unsigned char r_offset[8]; 993 /* Symbol index. */ 994 unsigned char r_sym[4]; 995 /* Special symbol. */ 996 unsigned char r_ssym[1]; 997 /* Third relocation. */ 998 unsigned char r_type3[1]; 999 /* Second relocation. */ 1000 unsigned char r_type2[1]; 1001 /* First relocation. */ 1002 unsigned char r_type[1]; 1003 /* Addend. */ 1004 unsigned char r_addend[8]; 1005 } Elf64_Mips_External_Rela; 1006 1007 typedef struct 1008 { 1009 /* Address of relocation. */ 1010 bfd_vma r_offset; 1011 /* Symbol index. */ 1012 unsigned long r_sym; 1013 /* Special symbol. */ 1014 unsigned char r_ssym; 1015 /* Third relocation. */ 1016 unsigned char r_type3; 1017 /* Second relocation. */ 1018 unsigned char r_type2; 1019 /* First relocation. */ 1020 unsigned char r_type; 1021 /* Addend. */ 1022 bfd_signed_vma r_addend; 1023 } Elf64_Mips_Internal_Rela; 1024 1025 /* MIPS ELF 64 relocation info access macros. */ 1026 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff) 1027 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff) 1028 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff) 1029 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff) 1030 1031 /* Values found in the r_ssym field of a relocation entry. */ 1032 1033 /* No relocation. */ 1034 #define RSS_UNDEF 0 1035 1036 /* Value of GP. */ 1037 #define RSS_GP 1 1038 1039 /* Value of GP in object being relocated. */ 1040 #define RSS_GP0 2 1041 1042 /* Address of location being relocated. */ 1043 #define RSS_LOC 3 1044 1045 /* A SHT_MIPS_OPTIONS section contains a series of options, each of 1047 which starts with this header. */ 1048 1049 typedef struct 1050 { 1051 /* Type of option. */ 1052 unsigned char kind[1]; 1053 /* Size of option descriptor, including header. */ 1054 unsigned char size[1]; 1055 /* Section index of affected section, or 0 for global option. */ 1056 unsigned char section[2]; 1057 /* Information specific to this kind of option. */ 1058 unsigned char info[4]; 1059 } Elf_External_Options; 1060 1061 typedef struct 1062 { 1063 /* Type of option. */ 1064 unsigned char kind; 1065 /* Size of option descriptor, including header. */ 1066 unsigned char size; 1067 /* Section index of affected section, or 0 for global option. */ 1068 uint16_t section; 1069 /* Information specific to this kind of option. */ 1070 uint32_t info; 1071 } Elf_Internal_Options; 1072 1073 /* MIPS ELF option header swapping routines. */ 1074 extern void bfd_mips_elf_swap_options_in 1075 (bfd *, const Elf_External_Options *, Elf_Internal_Options *); 1076 extern void bfd_mips_elf_swap_options_out 1077 (bfd *, const Elf_Internal_Options *, Elf_External_Options *); 1078 1079 /* Values which may appear in the kind field of an Elf_Options 1080 structure. */ 1081 1082 /* Undefined. */ 1083 #define ODK_NULL 0 1084 1085 /* Register usage and GP value. */ 1086 #define ODK_REGINFO 1 1087 1088 /* Exception processing information. */ 1089 #define ODK_EXCEPTIONS 2 1090 1091 /* Section padding information. */ 1092 #define ODK_PAD 3 1093 1094 /* Hardware workarounds performed. */ 1095 #define ODK_HWPATCH 4 1096 1097 /* Fill value used by the linker. */ 1098 #define ODK_FILL 5 1099 1100 /* Reserved space for desktop tools. */ 1101 #define ODK_TAGS 6 1102 1103 /* Hardware workarounds, AND bits when merging. */ 1104 #define ODK_HWAND 7 1105 1106 /* Hardware workarounds, OR bits when merging. */ 1107 #define ODK_HWOR 8 1108 1109 /* GP group to use for text/data sections. */ 1110 #define ODK_GP_GROUP 9 1111 1112 /* ID information. */ 1113 #define ODK_IDENT 10 1114 1115 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo 1116 structure. In the 64 bit ABI, it is the following structure. The 1117 info field of the options header is not used. */ 1118 1119 typedef struct 1120 { 1121 /* Mask of general purpose registers used. */ 1122 unsigned char ri_gprmask[4]; 1123 /* Padding. */ 1124 unsigned char ri_pad[4]; 1125 /* Mask of co-processor registers used. */ 1126 unsigned char ri_cprmask[4][4]; 1127 /* GP register value for this object file. */ 1128 unsigned char ri_gp_value[8]; 1129 } Elf64_External_RegInfo; 1130 1131 typedef struct 1132 { 1133 /* Mask of general purpose registers used. */ 1134 uint32_t ri_gprmask; 1135 /* Padding. */ 1136 uint32_t ri_pad; 1137 /* Mask of co-processor registers used. */ 1138 uint32_t ri_cprmask[4]; 1139 /* GP register value for this object file. */ 1140 uint64_t ri_gp_value; 1141 } Elf64_Internal_RegInfo; 1142 1143 /* ABI Flags structure version 0. */ 1144 1145 typedef struct 1146 { 1147 /* Version of flags structure. */ 1148 unsigned char version[2]; 1149 /* The level of the ISA: 1-5, 32, 64. */ 1150 unsigned char isa_level[1]; 1151 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ 1152 unsigned char isa_rev[1]; 1153 /* The size of general purpose registers. */ 1154 unsigned char gpr_size[1]; 1155 /* The size of co-processor 1 registers. */ 1156 unsigned char cpr1_size[1]; 1157 /* The size of co-processor 2 registers. */ 1158 unsigned char cpr2_size[1]; 1159 /* The floating-point ABI. */ 1160 unsigned char fp_abi[1]; 1161 /* Processor-specific extension. */ 1162 unsigned char isa_ext[4]; 1163 /* Mask of ASEs used. */ 1164 unsigned char ases[4]; 1165 /* Mask of general flags. */ 1166 unsigned char flags1[4]; 1167 unsigned char flags2[4]; 1168 } Elf_External_ABIFlags_v0; 1169 1170 typedef struct elf_internal_abiflags_v0 1171 { 1172 /* Version of flags structure. */ 1173 unsigned short version; 1174 /* The level of the ISA: 1-5, 32, 64. */ 1175 unsigned char isa_level; 1176 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ 1177 unsigned char isa_rev; 1178 /* The size of general purpose registers. */ 1179 unsigned char gpr_size; 1180 /* The size of co-processor 1 registers. */ 1181 unsigned char cpr1_size; 1182 /* The size of co-processor 2 registers. */ 1183 unsigned char cpr2_size; 1184 /* The floating-point ABI. */ 1185 unsigned char fp_abi; 1186 /* Processor-specific extension. */ 1187 unsigned long isa_ext; 1188 /* Mask of ASEs used. */ 1189 unsigned long ases; 1190 /* Mask of general flags. */ 1191 unsigned long flags1; 1192 unsigned long flags2; 1193 } Elf_Internal_ABIFlags_v0; 1194 1195 typedef struct 1196 { 1197 /* The hash value computed from the name of the corresponding 1198 dynamic symbol. */ 1199 unsigned char ms_hash_value[4]; 1200 /* Contains both the dynamic relocation index and the symbol flags 1201 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used 1202 to access the individual values. The dynamic relocation index 1203 identifies the first entry in the .rel.dyn section that 1204 references the dynamic symbol corresponding to this msym entry. 1205 If the index is 0, no dynamic relocations are associated with the 1206 symbol. The symbol flags field is reserved for future use. */ 1207 unsigned char ms_info[4]; 1208 } Elf32_External_Msym; 1209 1210 typedef struct 1211 { 1212 /* The hash value computed from the name of the corresponding 1213 dynamic symbol. */ 1214 unsigned long ms_hash_value; 1215 /* Contains both the dynamic relocation index and the symbol flags 1216 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used 1217 to access the individual values. The dynamic relocation index 1218 identifies the first entry in the .rel.dyn section that 1219 references the dynamic symbol corresponding to this msym entry. 1220 If the index is 0, no dynamic relocations are associated with the 1221 symbol. The symbol flags field is reserved for future use. */ 1222 unsigned long ms_info; 1223 } Elf32_Internal_Msym; 1224 1225 #define ELF32_MS_REL_INDEX(i) ((i) >> 8) 1226 #define ELF32_MS_FLAGS(i) (i) & 0xff) 1227 #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff)) 1228 1229 /* MIPS ELF reginfo swapping routines. */ 1230 extern void bfd_mips_elf64_swap_reginfo_in 1231 (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *); 1232 extern void bfd_mips_elf64_swap_reginfo_out 1233 (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *); 1234 1235 /* MIPS ELF flags swapping routines. */ 1236 extern void bfd_mips_elf_swap_abiflags_v0_in 1237 (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *); 1238 extern void bfd_mips_elf_swap_abiflags_v0_out 1239 (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *); 1240 1241 /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */ 1242 #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */ 1243 #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */ 1244 #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */ 1245 #define OEX_SMM 0x20000 /* Force sequential memory mode. */ 1246 #define OEX_FPDBUG 0x40000 /* Force precise floating-point 1247 exceptions (debug mode). */ 1248 #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */ 1249 1250 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */ 1251 #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */ 1252 #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */ 1253 #define OEX_FPU_OFLO 0x04 /* Overflow exception. */ 1254 #define OEX_FPU_UFLO 0x02 /* Underflow exception. */ 1255 #define OEX_FPU_INEX 0x01 /* Inexact exception. */ 1256 1257 /* Masks for the info word of an ODK_PAD descriptor. */ 1258 #define OPAD_PREFIX 0x01 1259 #define OPAD_POSTFIX 0x02 1260 #define OPAD_SYMBOL 0x04 1261 1262 /* Masks for the info word of an ODK_HWPATCH descriptor. */ 1263 #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */ 1264 #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */ 1265 #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */ 1266 #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug 1267 (clean == 1). */ 1268 #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned 1269 load patch. */ 1270 1271 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */ 1272 #define OGP_GROUP 0x0000ffff /* GP group number. */ 1273 #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */ 1274 1275 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */ 1276 #define OHWA0_R4KEOP_CHECKED 0x00000001 1277 #define OHWA0_R4KEOP_CLEAN 0x00000002 1278 1279 /* Values for the xxx_size bytes of an ABI flags structure. */ 1280 1281 #define AFL_REG_NONE 0x00 /* No registers. */ 1282 #define AFL_REG_32 0x01 /* 32-bit registers. */ 1283 #define AFL_REG_64 0x02 /* 64-bit registers. */ 1284 #define AFL_REG_128 0x03 /* 128-bit registers. */ 1285 1286 /* Masks for the ases word of an ABI flags structure. */ 1287 1288 #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */ 1289 #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */ 1290 #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */ 1291 #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */ 1292 #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */ 1293 #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */ 1294 #define AFL_ASE_MT 0x00000040 /* MT ASE. */ 1295 #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */ 1296 #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */ 1297 #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */ 1298 #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */ 1299 #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */ 1300 #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */ 1301 #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */ 1302 #define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */ 1303 #define AFL_ASE_CRC 0x00008000 /* CRC ASE. */ 1304 #define AFL_ASE_RESERVED1 0x00010000 /* Reserved by MIPS Tech for WIP. */ 1305 #define AFL_ASE_GINV 0x00020000 /* GINV ASE. */ 1306 #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE. */ 1307 #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE. */ 1308 #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions. */ 1309 #define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions. */ 1310 #define AFL_ASE_MASK 0x003effff /* All ASEs. */ 1311 1312 /* Values for the isa_ext word of an ABI flags structure. */ 1313 1314 #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */ 1315 #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */ 1316 #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */ 1317 #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */ 1318 #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */ 1319 #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */ 1320 #define AFL_EXT_4010 8 /* LSI R4010 instruction. */ 1321 #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */ 1322 #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */ 1323 #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */ 1324 #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */ 1325 #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */ 1326 #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */ 1327 #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */ 1328 #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */ 1329 #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */ 1330 #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */ 1331 #define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */ 1332 #define AFL_EXT_INTERAPTIV_MR2 20 /* Imagination interAptiv MR2. */ 1333 1334 /* Masks for the flags1 word of an ABI flags structure. */ 1335 #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */ 1336 1337 extern unsigned int bfd_mips_isa_ext (bfd *); 1338 1339 1341 /* Object attribute tags. */ 1342 enum 1343 { 1344 /* 0-3 are generic. */ 1345 1346 /* Floating-point ABI used by this object file. */ 1347 Tag_GNU_MIPS_ABI_FP = 4, 1348 1349 /* MSA ABI used by this object file. */ 1350 Tag_GNU_MIPS_ABI_MSA = 8, 1351 }; 1352 1353 /* Object attribute values. */ 1354 enum 1355 { 1356 /* Values defined for Tag_GNU_MIPS_ABI_FP. */ 1357 1358 /* Not tagged or not using any ABIs affected by the differences. */ 1359 Val_GNU_MIPS_ABI_FP_ANY = 0, 1360 1361 /* Using hard-float -mdouble-float. */ 1362 Val_GNU_MIPS_ABI_FP_DOUBLE = 1, 1363 1364 /* Using hard-float -msingle-float. */ 1365 Val_GNU_MIPS_ABI_FP_SINGLE = 2, 1366 1367 /* Using soft-float. */ 1368 Val_GNU_MIPS_ABI_FP_SOFT = 3, 1369 1370 /* Using -mips32r2 -mfp64. */ 1371 Val_GNU_MIPS_ABI_FP_OLD_64 = 4, 1372 1373 /* Using -mfpxx */ 1374 Val_GNU_MIPS_ABI_FP_XX = 5, 1375 1376 /* Using -mips32r2 -mfp64. */ 1377 Val_GNU_MIPS_ABI_FP_64 = 6, 1378 1379 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */ 1380 Val_GNU_MIPS_ABI_FP_64A = 7, 1381 1382 /* This is reserved for backward-compatibility with an earlier 1383 implementation of the MIPS NaN2008 functionality. */ 1384 Val_GNU_MIPS_ABI_FP_NAN2008 = 8, 1385 1386 /* Values defined for Tag_GNU_MIPS_ABI_MSA. */ 1387 1388 /* Not tagged or not using any ABIs affected by the differences. */ 1389 Val_GNU_MIPS_ABI_MSA_ANY = 0, 1390 1391 /* Using 128-bit MSA. */ 1392 Val_GNU_MIPS_ABI_MSA_128 = 1, 1393 }; 1394 1395 #ifdef __cplusplus 1396 } 1397 #endif 1398 1399 #endif /* _ELF_MIPS_H */ 1400
Indexes created Tue Feb 24 01:34:59 UTC 2026