1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ 2 /* Instruction building/extraction support for epiphany. -*- C -*- 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 5 - the resultant file is machine generated, cgen-ibld.in isn't 6 7 Copyright (C) 1996-2025 Free Software Foundation, Inc. 8 9 This file is part of libopcodes. 10 11 This library is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 3, or (at your option) 14 any later version. 15 16 It is distributed in the hope that it will be useful, but WITHOUT 17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software Foundation, Inc., 23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 24 25 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 26 Keep that in mind. */ 27 28 #include "sysdep.h" 29 #include <stdio.h> 30 #include "ansidecl.h" 31 #include "dis-asm.h" 32 #include "bfd.h" 33 #include "symcat.h" 34 #include "epiphany-desc.h" 35 #include "epiphany-opc.h" 36 #include "cgen/basic-modes.h" 37 #include "opintl.h" 38 #include "safe-ctype.h" 39 40 #undef min 41 #define min(a,b) ((a) < (b) ? (a) : (b)) 42 #undef max 43 #define max(a,b) ((a) > (b) ? (a) : (b)) 44 45 /* Used by the ifield rtx function. */ 46 #define FLD(f) (fields->f) 47 48 static const char * insert_normal 49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 51 static const char * insert_insn_normal 52 (CGEN_CPU_DESC, const CGEN_INSN *, 53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 54 static int extract_normal 55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 56 unsigned int, unsigned int, unsigned int, unsigned int, 57 unsigned int, unsigned int, bfd_vma, long *); 58 static int extract_insn_normal 59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 61 #if CGEN_INT_INSN_P 62 static void put_insn_int_value 63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 64 #endif 65 #if ! CGEN_INT_INSN_P 66 static CGEN_INLINE void insert_1 67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 68 static CGEN_INLINE int fill_cache 69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 70 static CGEN_INLINE long extract_1 71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 72 #endif 73 74 /* Operand insertion. */ 76 77 #if ! CGEN_INT_INSN_P 78 79 /* Subroutine of insert_normal. */ 80 81 static CGEN_INLINE void 82 insert_1 (CGEN_CPU_DESC cd, 83 unsigned long value, 84 int start, 85 int length, 86 int word_length, 87 unsigned char *bufp) 88 { 89 unsigned long x, mask; 90 int shift; 91 92 x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); 93 94 /* Written this way to avoid undefined behaviour. */ 95 mask = (1UL << (length - 1) << 1) - 1; 96 if (CGEN_INSN_LSB0_P) 97 shift = (start + 1) - length; 98 else 99 shift = (word_length - (start + length)); 100 x = (x & ~(mask << shift)) | ((value & mask) << shift); 101 102 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian); 103 } 104 105 #endif /* ! CGEN_INT_INSN_P */ 106 107 /* Default insertion routine. 108 109 ATTRS is a mask of the boolean attributes. 110 WORD_OFFSET is the offset in bits from the start of the insn of the value. 111 WORD_LENGTH is the length of the word in bits in which the value resides. 112 START is the starting bit number in the word, architecture origin. 113 LENGTH is the length of VALUE in bits. 114 TOTAL_LENGTH is the total length of the insn in bits. 115 116 The result is an error message or NULL if success. */ 117 118 /* ??? This duplicates functionality with bfd's howto table and 119 bfd_install_relocation. */ 120 /* ??? This doesn't handle bfd_vma's. Create another function when 121 necessary. */ 122 123 static const char * 124 insert_normal (CGEN_CPU_DESC cd, 125 long value, 126 unsigned int attrs, 127 unsigned int word_offset, 128 unsigned int start, 129 unsigned int length, 130 unsigned int word_length, 131 unsigned int total_length, 132 CGEN_INSN_BYTES_PTR buffer) 133 { 134 static char errbuf[100]; 135 unsigned long mask; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 /* Written this way to avoid undefined behaviour. */ 142 mask = (1UL << (length - 1) << 1) - 1; 143 144 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 145 abort (); 146 147 /* For architectures with insns smaller than the base-insn-bitsize, 148 word_length may be too big. */ 149 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 150 { 151 if (word_offset == 0 152 && word_length > total_length) 153 word_length = total_length; 154 } 155 156 /* Ensure VALUE will fit. */ 157 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 158 { 159 long minval = - (1UL << (length - 1)); 160 unsigned long maxval = mask; 161 162 if ((value > 0 && (unsigned long) value > maxval) 163 || value < minval) 164 { 165 /* xgettext:c-format */ 166 sprintf (errbuf, 167 _("operand out of range (%ld not between %ld and %lu)"), 168 value, minval, maxval); 169 return errbuf; 170 } 171 } 172 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 173 { 174 unsigned long maxval = mask; 175 unsigned long val = (unsigned long) value; 176 177 /* For hosts with a word size > 32 check to see if value has been sign 178 extended beyond 32 bits. If so then ignore these higher sign bits 179 as the user is attempting to store a 32-bit signed value into an 180 unsigned 32-bit field which is allowed. */ 181 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 182 val &= 0xFFFFFFFF; 183 184 if (val > maxval) 185 { 186 /* xgettext:c-format */ 187 sprintf (errbuf, 188 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 189 val, maxval); 190 return errbuf; 191 } 192 } 193 else 194 { 195 if (! cgen_signed_overflow_ok_p (cd)) 196 { 197 long minval = - (1UL << (length - 1)); 198 long maxval = (1UL << (length - 1)) - 1; 199 200 if (value < minval || value > maxval) 201 { 202 sprintf 203 /* xgettext:c-format */ 204 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 205 value, minval, maxval); 206 return errbuf; 207 } 208 } 209 } 210 211 #if CGEN_INT_INSN_P 212 213 { 214 int shift_within_word, shift_to_word, shift; 215 216 /* How to shift the value to BIT0 of the word. */ 217 shift_to_word = total_length - (word_offset + word_length); 218 219 /* How to shift the value to the field within the word. */ 220 if (CGEN_INSN_LSB0_P) 221 shift_within_word = start + 1 - length; 222 else 223 shift_within_word = word_length - start - length; 224 225 /* The total SHIFT, then mask in the value. */ 226 shift = shift_to_word + shift_within_word; 227 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 228 } 229 230 #else /* ! CGEN_INT_INSN_P */ 231 232 { 233 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 234 235 insert_1 (cd, value, start, length, word_length, bufp); 236 } 237 238 #endif /* ! CGEN_INT_INSN_P */ 239 240 return NULL; 241 } 242 243 /* Default insn builder (insert handler). 244 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 245 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 246 recorded in host byte order, otherwise BUFFER is an array of bytes 247 and the value is recorded in target byte order). 248 The result is an error message or NULL if success. */ 249 250 static const char * 251 insert_insn_normal (CGEN_CPU_DESC cd, 252 const CGEN_INSN * insn, 253 CGEN_FIELDS * fields, 254 CGEN_INSN_BYTES_PTR buffer, 255 bfd_vma pc) 256 { 257 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 258 unsigned long value; 259 const CGEN_SYNTAX_CHAR_TYPE * syn; 260 261 CGEN_INIT_INSERT (cd); 262 value = CGEN_INSN_BASE_VALUE (insn); 263 264 /* If we're recording insns as numbers (rather than a string of bytes), 265 target byte order handling is deferred until later. */ 266 267 #if CGEN_INT_INSN_P 268 269 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 270 CGEN_FIELDS_BITSIZE (fields), value); 271 272 #else 273 274 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 275 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 276 value, cd->insn_endian); 277 278 #endif /* ! CGEN_INT_INSN_P */ 279 280 /* ??? It would be better to scan the format's fields. 281 Still need to be able to insert a value based on the operand though; 282 e.g. storing a branch displacement that got resolved later. 283 Needs more thought first. */ 284 285 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 286 { 287 const char *errmsg; 288 289 if (CGEN_SYNTAX_CHAR_P (* syn)) 290 continue; 291 292 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 293 fields, buffer, pc); 294 if (errmsg) 295 return errmsg; 296 } 297 298 return NULL; 299 } 300 301 #if CGEN_INT_INSN_P 302 /* Cover function to store an insn value into an integral insn. Must go here 303 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 304 305 static void 306 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 307 CGEN_INSN_BYTES_PTR buf, 308 int length, 309 int insn_length, 310 CGEN_INSN_INT value) 311 { 312 /* For architectures with insns smaller than the base-insn-bitsize, 313 length may be too big. */ 314 if (length > insn_length) 315 *buf = value; 316 else 317 { 318 int shift = insn_length - length; 319 /* Written this way to avoid undefined behaviour. */ 320 CGEN_INSN_INT mask = length == 0 ? 0 : (1UL << (length - 1) << 1) - 1; 321 322 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 323 } 324 } 325 #endif 326 327 /* Operand extraction. */ 329 330 #if ! CGEN_INT_INSN_P 331 332 /* Subroutine of extract_normal. 333 Ensure sufficient bytes are cached in EX_INFO. 334 OFFSET is the offset in bytes from the start of the insn of the value. 335 BYTES is the length of the needed value. 336 Returns 1 for success, 0 for failure. */ 337 338 static CGEN_INLINE int 339 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 340 CGEN_EXTRACT_INFO *ex_info, 341 int offset, 342 int bytes, 343 bfd_vma pc) 344 { 345 /* It's doubtful that the middle part has already been fetched so 346 we don't optimize that case. kiss. */ 347 unsigned int mask; 348 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 349 350 /* First do a quick check. */ 351 mask = (1 << bytes) - 1; 352 if (((ex_info->valid >> offset) & mask) == mask) 353 return 1; 354 355 /* Search for the first byte we need to read. */ 356 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 357 if (! (mask & ex_info->valid)) 358 break; 359 360 if (bytes) 361 { 362 int status; 363 364 pc += offset; 365 status = (*info->read_memory_func) 366 (pc, ex_info->insn_bytes + offset, bytes, info); 367 368 if (status != 0) 369 { 370 (*info->memory_error_func) (status, pc, info); 371 return 0; 372 } 373 374 ex_info->valid |= ((1 << bytes) - 1) << offset; 375 } 376 377 return 1; 378 } 379 380 /* Subroutine of extract_normal. */ 381 382 static CGEN_INLINE long 383 extract_1 (CGEN_CPU_DESC cd, 384 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 385 int start, 386 int length, 387 int word_length, 388 unsigned char *bufp, 389 bfd_vma pc ATTRIBUTE_UNUSED) 390 { 391 unsigned long x; 392 int shift; 393 394 x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); 395 396 if (CGEN_INSN_LSB0_P) 397 shift = (start + 1) - length; 398 else 399 shift = (word_length - (start + length)); 400 return x >> shift; 401 } 402 403 #endif /* ! CGEN_INT_INSN_P */ 404 405 /* Default extraction routine. 406 407 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 408 or sometimes less for cases like the m32r where the base insn size is 32 409 but some insns are 16 bits. 410 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 411 but for generality we take a bitmask of all of them. 412 WORD_OFFSET is the offset in bits from the start of the insn of the value. 413 WORD_LENGTH is the length of the word in bits in which the value resides. 414 START is the starting bit number in the word, architecture origin. 415 LENGTH is the length of VALUE in bits. 416 TOTAL_LENGTH is the total length of the insn in bits. 417 418 Returns 1 for success, 0 for failure. */ 419 420 /* ??? The return code isn't properly used. wip. */ 421 422 /* ??? This doesn't handle bfd_vma's. Create another function when 423 necessary. */ 424 425 static int 426 extract_normal (CGEN_CPU_DESC cd, 427 #if ! CGEN_INT_INSN_P 428 CGEN_EXTRACT_INFO *ex_info, 429 #else 430 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 431 #endif 432 CGEN_INSN_INT insn_value, 433 unsigned int attrs, 434 unsigned int word_offset, 435 unsigned int start, 436 unsigned int length, 437 unsigned int word_length, 438 unsigned int total_length, 439 #if ! CGEN_INT_INSN_P 440 bfd_vma pc, 441 #else 442 bfd_vma pc ATTRIBUTE_UNUSED, 443 #endif 444 long *valuep) 445 { 446 long value, mask; 447 448 /* If LENGTH is zero, this operand doesn't contribute to the value 449 so give it a standard value of zero. */ 450 if (length == 0) 451 { 452 *valuep = 0; 453 return 1; 454 } 455 456 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 457 abort (); 458 459 /* For architectures with insns smaller than the insn-base-bitsize, 460 word_length may be too big. */ 461 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 462 { 463 if (word_offset + word_length > total_length) 464 word_length = total_length - word_offset; 465 } 466 467 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 468 469 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 470 { 471 if (CGEN_INSN_LSB0_P) 472 value = insn_value >> ((word_offset + start + 1) - length); 473 else 474 value = insn_value >> (total_length - ( word_offset + start + length)); 475 } 476 477 #if ! CGEN_INT_INSN_P 478 479 else 480 { 481 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 482 483 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 484 abort (); 485 486 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 487 { 488 *valuep = 0; 489 return 0; 490 } 491 492 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 493 } 494 495 #endif /* ! CGEN_INT_INSN_P */ 496 497 /* Written this way to avoid undefined behaviour. */ 498 mask = (1UL << (length - 1) << 1) - 1; 499 500 value &= mask; 501 /* sign extend? */ 502 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 503 && (value & (1UL << (length - 1)))) 504 value |= ~mask; 505 506 *valuep = value; 507 508 return 1; 509 } 510 511 /* Default insn extractor. 512 513 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 514 The extracted fields are stored in FIELDS. 515 EX_INFO is used to handle reading variable length insns. 516 Return the length of the insn in bits, or 0 if no match, 517 or -1 if an error occurs fetching data (memory_error_func will have 518 been called). */ 519 520 static int 521 extract_insn_normal (CGEN_CPU_DESC cd, 522 const CGEN_INSN *insn, 523 CGEN_EXTRACT_INFO *ex_info, 524 CGEN_INSN_INT insn_value, 525 CGEN_FIELDS *fields, 526 bfd_vma pc) 527 { 528 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 529 const CGEN_SYNTAX_CHAR_TYPE *syn; 530 531 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 532 533 CGEN_INIT_EXTRACT (cd); 534 535 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 536 { 537 int length; 538 539 if (CGEN_SYNTAX_CHAR_P (*syn)) 540 continue; 541 542 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 543 ex_info, insn_value, fields, pc); 544 if (length <= 0) 545 return length; 546 } 547 548 /* We recognized and successfully extracted this insn. */ 549 return CGEN_INSN_BITSIZE (insn); 550 } 551 552 /* Machine generated code added here. */ 554 555 const char * epiphany_cgen_insert_operand 556 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 557 558 /* Main entry point for operand insertion. 559 560 This function is basically just a big switch statement. Earlier versions 561 used tables to look up the function to use, but 562 - if the table contains both assembler and disassembler functions then 563 the disassembler contains much of the assembler and vice-versa, 564 - there's a lot of inlining possibilities as things grow, 565 - using a switch statement avoids the function call overhead. 566 567 This function could be moved into `parse_insn_normal', but keeping it 568 separate makes clear the interface between `parse_insn_normal' and each of 569 the handlers. It's also needed by GAS to insert operands that couldn't be 570 resolved during parsing. */ 571 572 const char * 573 epiphany_cgen_insert_operand (CGEN_CPU_DESC cd, 574 int opindex, 575 CGEN_FIELDS * fields, 576 CGEN_INSN_BYTES_PTR buffer, 577 bfd_vma pc ATTRIBUTE_UNUSED) 578 { 579 const char * errmsg = NULL; 580 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 581 582 switch (opindex) 583 { 584 case EPIPHANY_OPERAND_DIRECTION : 585 errmsg = insert_normal (cd, fields->f_addsubx, 0, 0, 20, 1, 32, total_length, buffer); 586 break; 587 case EPIPHANY_OPERAND_DISP11 : 588 { 589 { 590 FLD (f_disp8) = ((((UINT) (FLD (f_disp11)) >> (3))) & (255)); 591 FLD (f_disp3) = ((FLD (f_disp11)) & (7)); 592 } 593 errmsg = insert_normal (cd, fields->f_disp3, 0, 0, 9, 3, 32, total_length, buffer); 594 if (errmsg) 595 break; 596 errmsg = insert_normal (cd, fields->f_disp8, 0, 0, 23, 8, 32, total_length, buffer); 597 if (errmsg) 598 break; 599 } 600 break; 601 case EPIPHANY_OPERAND_DISP3 : 602 errmsg = insert_normal (cd, fields->f_disp3, 0, 0, 9, 3, 32, total_length, buffer); 603 break; 604 case EPIPHANY_OPERAND_DPMI : 605 errmsg = insert_normal (cd, fields->f_subd, 0, 0, 24, 1, 32, total_length, buffer); 606 break; 607 case EPIPHANY_OPERAND_FRD : 608 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 3, 32, total_length, buffer); 609 break; 610 case EPIPHANY_OPERAND_FRD6 : 611 { 612 { 613 FLD (f_rd) = ((FLD (f_rd6)) & (7)); 614 FLD (f_rd_x) = ((UINT) (FLD (f_rd6)) >> (3)); 615 } 616 errmsg = insert_normal (cd, fields->f_rd_x, 0, 0, 31, 3, 32, total_length, buffer); 617 if (errmsg) 618 break; 619 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 3, 32, total_length, buffer); 620 if (errmsg) 621 break; 622 } 623 break; 624 case EPIPHANY_OPERAND_FRM : 625 errmsg = insert_normal (cd, fields->f_rm, 0, 0, 9, 3, 32, total_length, buffer); 626 break; 627 case EPIPHANY_OPERAND_FRM6 : 628 { 629 { 630 FLD (f_rm) = ((FLD (f_rm6)) & (7)); 631 FLD (f_rm_x) = ((UINT) (FLD (f_rm6)) >> (3)); 632 } 633 errmsg = insert_normal (cd, fields->f_rm_x, 0, 0, 25, 3, 32, total_length, buffer); 634 if (errmsg) 635 break; 636 errmsg = insert_normal (cd, fields->f_rm, 0, 0, 9, 3, 32, total_length, buffer); 637 if (errmsg) 638 break; 639 } 640 break; 641 case EPIPHANY_OPERAND_FRN : 642 errmsg = insert_normal (cd, fields->f_rn, 0, 0, 12, 3, 32, total_length, buffer); 643 break; 644 case EPIPHANY_OPERAND_FRN6 : 645 { 646 { 647 FLD (f_rn) = ((FLD (f_rn6)) & (7)); 648 FLD (f_rn_x) = ((UINT) (FLD (f_rn6)) >> (3)); 649 } 650 errmsg = insert_normal (cd, fields->f_rn_x, 0, 0, 28, 3, 32, total_length, buffer); 651 if (errmsg) 652 break; 653 errmsg = insert_normal (cd, fields->f_rn, 0, 0, 12, 3, 32, total_length, buffer); 654 if (errmsg) 655 break; 656 } 657 break; 658 case EPIPHANY_OPERAND_IMM16 : 659 { 660 { 661 FLD (f_imm8) = ((FLD (f_imm16)) & (255)); 662 FLD (f_imm_27_8) = ((UINT) (FLD (f_imm16)) >> (8)); 663 } 664 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 12, 8, 32, total_length, buffer); 665 if (errmsg) 666 break; 667 errmsg = insert_normal (cd, fields->f_imm_27_8, 0, 0, 27, 8, 32, total_length, buffer); 668 if (errmsg) 669 break; 670 } 671 break; 672 case EPIPHANY_OPERAND_IMM8 : 673 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 12, 8, 32, total_length, buffer); 674 break; 675 case EPIPHANY_OPERAND_RD : 676 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 3, 32, total_length, buffer); 677 break; 678 case EPIPHANY_OPERAND_RD6 : 679 { 680 { 681 FLD (f_rd) = ((FLD (f_rd6)) & (7)); 682 FLD (f_rd_x) = ((UINT) (FLD (f_rd6)) >> (3)); 683 } 684 errmsg = insert_normal (cd, fields->f_rd_x, 0, 0, 31, 3, 32, total_length, buffer); 685 if (errmsg) 686 break; 687 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 3, 32, total_length, buffer); 688 if (errmsg) 689 break; 690 } 691 break; 692 case EPIPHANY_OPERAND_RM : 693 errmsg = insert_normal (cd, fields->f_rm, 0, 0, 9, 3, 32, total_length, buffer); 694 break; 695 case EPIPHANY_OPERAND_RM6 : 696 { 697 { 698 FLD (f_rm) = ((FLD (f_rm6)) & (7)); 699 FLD (f_rm_x) = ((UINT) (FLD (f_rm6)) >> (3)); 700 } 701 errmsg = insert_normal (cd, fields->f_rm_x, 0, 0, 25, 3, 32, total_length, buffer); 702 if (errmsg) 703 break; 704 errmsg = insert_normal (cd, fields->f_rm, 0, 0, 9, 3, 32, total_length, buffer); 705 if (errmsg) 706 break; 707 } 708 break; 709 case EPIPHANY_OPERAND_RN : 710 errmsg = insert_normal (cd, fields->f_rn, 0, 0, 12, 3, 32, total_length, buffer); 711 break; 712 case EPIPHANY_OPERAND_RN6 : 713 { 714 { 715 FLD (f_rn) = ((FLD (f_rn6)) & (7)); 716 FLD (f_rn_x) = ((UINT) (FLD (f_rn6)) >> (3)); 717 } 718 errmsg = insert_normal (cd, fields->f_rn_x, 0, 0, 28, 3, 32, total_length, buffer); 719 if (errmsg) 720 break; 721 errmsg = insert_normal (cd, fields->f_rn, 0, 0, 12, 3, 32, total_length, buffer); 722 if (errmsg) 723 break; 724 } 725 break; 726 case EPIPHANY_OPERAND_SD : 727 errmsg = insert_normal (cd, fields->f_sd, 0, 0, 15, 3, 32, total_length, buffer); 728 break; 729 case EPIPHANY_OPERAND_SD6 : 730 { 731 { 732 FLD (f_sd) = ((FLD (f_sd6)) & (7)); 733 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); 734 } 735 errmsg = insert_normal (cd, fields->f_sd_x, 0, 0, 31, 3, 32, total_length, buffer); 736 if (errmsg) 737 break; 738 errmsg = insert_normal (cd, fields->f_sd, 0, 0, 15, 3, 32, total_length, buffer); 739 if (errmsg) 740 break; 741 } 742 break; 743 case EPIPHANY_OPERAND_SDDMA : 744 { 745 { 746 FLD (f_sd) = ((FLD (f_sd6)) & (7)); 747 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); 748 } 749 errmsg = insert_normal (cd, fields->f_sd_x, 0, 0, 31, 3, 32, total_length, buffer); 750 if (errmsg) 751 break; 752 errmsg = insert_normal (cd, fields->f_sd, 0, 0, 15, 3, 32, total_length, buffer); 753 if (errmsg) 754 break; 755 } 756 break; 757 case EPIPHANY_OPERAND_SDMEM : 758 { 759 { 760 FLD (f_sd) = ((FLD (f_sd6)) & (7)); 761 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); 762 } 763 errmsg = insert_normal (cd, fields->f_sd_x, 0, 0, 31, 3, 32, total_length, buffer); 764 if (errmsg) 765 break; 766 errmsg = insert_normal (cd, fields->f_sd, 0, 0, 15, 3, 32, total_length, buffer); 767 if (errmsg) 768 break; 769 } 770 break; 771 case EPIPHANY_OPERAND_SDMESH : 772 { 773 { 774 FLD (f_sd) = ((FLD (f_sd6)) & (7)); 775 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); 776 } 777 errmsg = insert_normal (cd, fields->f_sd_x, 0, 0, 31, 3, 32, total_length, buffer); 778 if (errmsg) 779 break; 780 errmsg = insert_normal (cd, fields->f_sd, 0, 0, 15, 3, 32, total_length, buffer); 781 if (errmsg) 782 break; 783 } 784 break; 785 case EPIPHANY_OPERAND_SHIFT : 786 errmsg = insert_normal (cd, fields->f_shift, 0, 0, 9, 5, 32, total_length, buffer); 787 break; 788 case EPIPHANY_OPERAND_SIMM11 : 789 { 790 { 791 FLD (f_disp8) = ((255) & (((USI) (FLD (f_sdisp11)) >> (3)))); 792 FLD (f_disp3) = ((FLD (f_sdisp11)) & (7)); 793 } 794 errmsg = insert_normal (cd, fields->f_disp3, 0, 0, 9, 3, 32, total_length, buffer); 795 if (errmsg) 796 break; 797 errmsg = insert_normal (cd, fields->f_disp8, 0, 0, 23, 8, 32, total_length, buffer); 798 if (errmsg) 799 break; 800 } 801 break; 802 case EPIPHANY_OPERAND_SIMM24 : 803 { 804 long value = fields->f_simm24; 805 value = ((SI) (((value) - (pc))) >> (1)); 806 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 31, 24, 32, total_length, buffer); 807 } 808 break; 809 case EPIPHANY_OPERAND_SIMM3 : 810 errmsg = insert_normal (cd, fields->f_sdisp3, 0|(1<<CGEN_IFLD_SIGNED), 0, 9, 3, 32, total_length, buffer); 811 break; 812 case EPIPHANY_OPERAND_SIMM8 : 813 { 814 long value = fields->f_simm8; 815 value = ((SI) (((value) - (pc))) >> (1)); 816 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer); 817 } 818 break; 819 case EPIPHANY_OPERAND_SN : 820 errmsg = insert_normal (cd, fields->f_sn, 0, 0, 12, 3, 32, total_length, buffer); 821 break; 822 case EPIPHANY_OPERAND_SN6 : 823 { 824 { 825 FLD (f_sn) = ((FLD (f_sn6)) & (7)); 826 FLD (f_sn_x) = ((UINT) (FLD (f_sn6)) >> (3)); 827 } 828 errmsg = insert_normal (cd, fields->f_sn_x, 0, 0, 28, 3, 32, total_length, buffer); 829 if (errmsg) 830 break; 831 errmsg = insert_normal (cd, fields->f_sn, 0, 0, 12, 3, 32, total_length, buffer); 832 if (errmsg) 833 break; 834 } 835 break; 836 case EPIPHANY_OPERAND_SNDMA : 837 { 838 { 839 FLD (f_sn) = ((FLD (f_sn6)) & (7)); 840 FLD (f_sn_x) = ((UINT) (FLD (f_sn6)) >> (3)); 841 } 842 errmsg = insert_normal (cd, fields->f_sn_x, 0, 0, 28, 3, 32, total_length, buffer); 843 if (errmsg) 844 break; 845 errmsg = insert_normal (cd, fields->f_sn, 0, 0, 12, 3, 32, total_length, buffer); 846 if (errmsg) 847 break; 848 } 849 break; 850 case EPIPHANY_OPERAND_SNMEM : 851 { 852 { 853 FLD (f_sn) = ((FLD (f_sn6)) & (7)); 854 FLD (f_sn_x) = ((UINT) (FLD (f_sn6)) >> (3)); 855 } 856 errmsg = insert_normal (cd, fields->f_sn_x, 0, 0, 28, 3, 32, total_length, buffer); 857 if (errmsg) 858 break; 859 errmsg = insert_normal (cd, fields->f_sn, 0, 0, 12, 3, 32, total_length, buffer); 860 if (errmsg) 861 break; 862 } 863 break; 864 case EPIPHANY_OPERAND_SNMESH : 865 { 866 { 867 FLD (f_sn) = ((FLD (f_sn6)) & (7)); 868 FLD (f_sn_x) = ((UINT) (FLD (f_sn6)) >> (3)); 869 } 870 errmsg = insert_normal (cd, fields->f_sn_x, 0, 0, 28, 3, 32, total_length, buffer); 871 if (errmsg) 872 break; 873 errmsg = insert_normal (cd, fields->f_sn, 0, 0, 12, 3, 32, total_length, buffer); 874 if (errmsg) 875 break; 876 } 877 break; 878 case EPIPHANY_OPERAND_SWI_NUM : 879 errmsg = insert_normal (cd, fields->f_trap_num, 0, 0, 15, 6, 32, total_length, buffer); 880 break; 881 case EPIPHANY_OPERAND_TRAPNUM6 : 882 errmsg = insert_normal (cd, fields->f_trap_num, 0, 0, 15, 6, 32, total_length, buffer); 883 break; 884 885 default : 886 /* xgettext:c-format */ 887 opcodes_error_handler 888 (_("internal error: unrecognized field %d while building insn"), 889 opindex); 890 abort (); 891 } 892 893 return errmsg; 894 } 895 896 int epiphany_cgen_extract_operand 897 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 898 899 /* Main entry point for operand extraction. 900 The result is <= 0 for error, >0 for success. 901 ??? Actual values aren't well defined right now. 902 903 This function is basically just a big switch statement. Earlier versions 904 used tables to look up the function to use, but 905 - if the table contains both assembler and disassembler functions then 906 the disassembler contains much of the assembler and vice-versa, 907 - there's a lot of inlining possibilities as things grow, 908 - using a switch statement avoids the function call overhead. 909 910 This function could be moved into `print_insn_normal', but keeping it 911 separate makes clear the interface between `print_insn_normal' and each of 912 the handlers. */ 913 914 int 915 epiphany_cgen_extract_operand (CGEN_CPU_DESC cd, 916 int opindex, 917 CGEN_EXTRACT_INFO *ex_info, 918 CGEN_INSN_INT insn_value, 919 CGEN_FIELDS * fields, 920 bfd_vma pc) 921 { 922 /* Assume success (for those operands that are nops). */ 923 int length = 1; 924 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 925 926 switch (opindex) 927 { 928 case EPIPHANY_OPERAND_DIRECTION : 929 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 1, 32, total_length, pc, & fields->f_addsubx); 930 break; 931 case EPIPHANY_OPERAND_DISP11 : 932 { 933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_disp3); 934 if (length <= 0) break; 935 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_disp8); 936 if (length <= 0) break; 937 { 938 FLD (f_disp11) = ((((FLD (f_disp8)) << (3))) | (FLD (f_disp3))); 939 } 940 } 941 break; 942 case EPIPHANY_OPERAND_DISP3 : 943 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_disp3); 944 break; 945 case EPIPHANY_OPERAND_DPMI : 946 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 1, 32, total_length, pc, & fields->f_subd); 947 break; 948 case EPIPHANY_OPERAND_FRD : 949 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_rd); 950 break; 951 case EPIPHANY_OPERAND_FRD6 : 952 { 953 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_rd_x); 954 if (length <= 0) break; 955 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_rd); 956 if (length <= 0) break; 957 { 958 FLD (f_rd6) = ((((FLD (f_rd_x)) << (3))) | (FLD (f_rd))); 959 } 960 } 961 break; 962 case EPIPHANY_OPERAND_FRM : 963 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rm); 964 break; 965 case EPIPHANY_OPERAND_FRM6 : 966 { 967 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_rm_x); 968 if (length <= 0) break; 969 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rm); 970 if (length <= 0) break; 971 { 972 FLD (f_rm6) = ((((FLD (f_rm_x)) << (3))) | (FLD (f_rm))); 973 } 974 } 975 break; 976 case EPIPHANY_OPERAND_FRN : 977 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rn); 978 break; 979 case EPIPHANY_OPERAND_FRN6 : 980 { 981 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_rn_x); 982 if (length <= 0) break; 983 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rn); 984 if (length <= 0) break; 985 { 986 FLD (f_rn6) = ((((FLD (f_rn_x)) << (3))) | (FLD (f_rn))); 987 } 988 } 989 break; 990 case EPIPHANY_OPERAND_IMM16 : 991 { 992 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 8, 32, total_length, pc, & fields->f_imm8); 993 if (length <= 0) break; 994 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 8, 32, total_length, pc, & fields->f_imm_27_8); 995 if (length <= 0) break; 996 { 997 FLD (f_imm16) = ((((FLD (f_imm_27_8)) << (8))) | (FLD (f_imm8))); 998 } 999 } 1000 break; 1001 case EPIPHANY_OPERAND_IMM8 : 1002 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 8, 32, total_length, pc, & fields->f_imm8); 1003 break; 1004 case EPIPHANY_OPERAND_RD : 1005 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_rd); 1006 break; 1007 case EPIPHANY_OPERAND_RD6 : 1008 { 1009 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_rd_x); 1010 if (length <= 0) break; 1011 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_rd); 1012 if (length <= 0) break; 1013 { 1014 FLD (f_rd6) = ((((FLD (f_rd_x)) << (3))) | (FLD (f_rd))); 1015 } 1016 } 1017 break; 1018 case EPIPHANY_OPERAND_RM : 1019 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rm); 1020 break; 1021 case EPIPHANY_OPERAND_RM6 : 1022 { 1023 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_rm_x); 1024 if (length <= 0) break; 1025 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rm); 1026 if (length <= 0) break; 1027 { 1028 FLD (f_rm6) = ((((FLD (f_rm_x)) << (3))) | (FLD (f_rm))); 1029 } 1030 } 1031 break; 1032 case EPIPHANY_OPERAND_RN : 1033 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rn); 1034 break; 1035 case EPIPHANY_OPERAND_RN6 : 1036 { 1037 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_rn_x); 1038 if (length <= 0) break; 1039 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rn); 1040 if (length <= 0) break; 1041 { 1042 FLD (f_rn6) = ((((FLD (f_rn_x)) << (3))) | (FLD (f_rn))); 1043 } 1044 } 1045 break; 1046 case EPIPHANY_OPERAND_SD : 1047 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_sd); 1048 break; 1049 case EPIPHANY_OPERAND_SD6 : 1050 { 1051 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_sd_x); 1052 if (length <= 0) break; 1053 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_sd); 1054 if (length <= 0) break; 1055 { 1056 FLD (f_sd6) = ((((FLD (f_sd_x)) << (3))) | (FLD (f_sd))); 1057 } 1058 } 1059 break; 1060 case EPIPHANY_OPERAND_SDDMA : 1061 { 1062 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_sd_x); 1063 if (length <= 0) break; 1064 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_sd); 1065 if (length <= 0) break; 1066 { 1067 FLD (f_sd6) = ((((FLD (f_sd_x)) << (3))) | (FLD (f_sd))); 1068 } 1069 } 1070 break; 1071 case EPIPHANY_OPERAND_SDMEM : 1072 { 1073 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_sd_x); 1074 if (length <= 0) break; 1075 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_sd); 1076 if (length <= 0) break; 1077 { 1078 FLD (f_sd6) = ((((FLD (f_sd_x)) << (3))) | (FLD (f_sd))); 1079 } 1080 } 1081 break; 1082 case EPIPHANY_OPERAND_SDMESH : 1083 { 1084 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 3, 32, total_length, pc, & fields->f_sd_x); 1085 if (length <= 0) break; 1086 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_sd); 1087 if (length <= 0) break; 1088 { 1089 FLD (f_sd6) = ((((FLD (f_sd_x)) << (3))) | (FLD (f_sd))); 1090 } 1091 } 1092 break; 1093 case EPIPHANY_OPERAND_SHIFT : 1094 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 5, 32, total_length, pc, & fields->f_shift); 1095 break; 1096 case EPIPHANY_OPERAND_SIMM11 : 1097 { 1098 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_disp3); 1099 if (length <= 0) break; 1100 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_disp8); 1101 if (length <= 0) break; 1102 { 1103 FLD (f_sdisp11) = ((((((((((FLD (f_disp8)) << (3))) | (FLD (f_disp3)))) & (2047))) ^ (1024))) - (1024)); 1104 } 1105 } 1106 break; 1107 case EPIPHANY_OPERAND_SIMM24 : 1108 { 1109 long value; 1110 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 31, 24, 32, total_length, pc, & value); 1111 value = ((((value) * (2))) + (pc)); 1112 fields->f_simm24 = value; 1113 } 1114 break; 1115 case EPIPHANY_OPERAND_SIMM3 : 1116 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 9, 3, 32, total_length, pc, & fields->f_sdisp3); 1117 break; 1118 case EPIPHANY_OPERAND_SIMM8 : 1119 { 1120 long value; 1121 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & value); 1122 value = ((((value) * (2))) + (pc)); 1123 fields->f_simm8 = value; 1124 } 1125 break; 1126 case EPIPHANY_OPERAND_SN : 1127 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_sn); 1128 break; 1129 case EPIPHANY_OPERAND_SN6 : 1130 { 1131 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_sn_x); 1132 if (length <= 0) break; 1133 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_sn); 1134 if (length <= 0) break; 1135 { 1136 FLD (f_sn6) = ((((FLD (f_sn_x)) << (3))) | (FLD (f_sn))); 1137 } 1138 } 1139 break; 1140 case EPIPHANY_OPERAND_SNDMA : 1141 { 1142 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_sn_x); 1143 if (length <= 0) break; 1144 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_sn); 1145 if (length <= 0) break; 1146 { 1147 FLD (f_sn6) = ((((FLD (f_sn_x)) << (3))) | (FLD (f_sn))); 1148 } 1149 } 1150 break; 1151 case EPIPHANY_OPERAND_SNMEM : 1152 { 1153 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_sn_x); 1154 if (length <= 0) break; 1155 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_sn); 1156 if (length <= 0) break; 1157 { 1158 FLD (f_sn6) = ((((FLD (f_sn_x)) << (3))) | (FLD (f_sn))); 1159 } 1160 } 1161 break; 1162 case EPIPHANY_OPERAND_SNMESH : 1163 { 1164 length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_sn_x); 1165 if (length <= 0) break; 1166 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_sn); 1167 if (length <= 0) break; 1168 { 1169 FLD (f_sn6) = ((((FLD (f_sn_x)) << (3))) | (FLD (f_sn))); 1170 } 1171 } 1172 break; 1173 case EPIPHANY_OPERAND_SWI_NUM : 1174 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 6, 32, total_length, pc, & fields->f_trap_num); 1175 break; 1176 case EPIPHANY_OPERAND_TRAPNUM6 : 1177 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 6, 32, total_length, pc, & fields->f_trap_num); 1178 break; 1179 1180 default : 1181 /* xgettext:c-format */ 1182 opcodes_error_handler 1183 (_("internal error: unrecognized field %d while decoding insn"), 1184 opindex); 1185 abort (); 1186 } 1187 1188 return length; 1189 } 1190 1191 cgen_insert_fn * const epiphany_cgen_insert_handlers[] = 1192 { 1193 insert_insn_normal, 1194 }; 1195 1196 cgen_extract_fn * const epiphany_cgen_extract_handlers[] = 1197 { 1198 extract_insn_normal, 1199 }; 1200 1201 int epiphany_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 1202 bfd_vma epiphany_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 1203 1204 /* Getting values from cgen_fields is handled by a collection of functions. 1205 They are distinguished by the type of the VALUE argument they return. 1206 TODO: floating point, inlining support, remove cases where result type 1207 not appropriate. */ 1208 1209 int 1210 epiphany_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1211 int opindex, 1212 const CGEN_FIELDS * fields) 1213 { 1214 int value; 1215 1216 switch (opindex) 1217 { 1218 case EPIPHANY_OPERAND_DIRECTION : 1219 value = fields->f_addsubx; 1220 break; 1221 case EPIPHANY_OPERAND_DISP11 : 1222 value = fields->f_disp11; 1223 break; 1224 case EPIPHANY_OPERAND_DISP3 : 1225 value = fields->f_disp3; 1226 break; 1227 case EPIPHANY_OPERAND_DPMI : 1228 value = fields->f_subd; 1229 break; 1230 case EPIPHANY_OPERAND_FRD : 1231 value = fields->f_rd; 1232 break; 1233 case EPIPHANY_OPERAND_FRD6 : 1234 value = fields->f_rd6; 1235 break; 1236 case EPIPHANY_OPERAND_FRM : 1237 value = fields->f_rm; 1238 break; 1239 case EPIPHANY_OPERAND_FRM6 : 1240 value = fields->f_rm6; 1241 break; 1242 case EPIPHANY_OPERAND_FRN : 1243 value = fields->f_rn; 1244 break; 1245 case EPIPHANY_OPERAND_FRN6 : 1246 value = fields->f_rn6; 1247 break; 1248 case EPIPHANY_OPERAND_IMM16 : 1249 value = fields->f_imm16; 1250 break; 1251 case EPIPHANY_OPERAND_IMM8 : 1252 value = fields->f_imm8; 1253 break; 1254 case EPIPHANY_OPERAND_RD : 1255 value = fields->f_rd; 1256 break; 1257 case EPIPHANY_OPERAND_RD6 : 1258 value = fields->f_rd6; 1259 break; 1260 case EPIPHANY_OPERAND_RM : 1261 value = fields->f_rm; 1262 break; 1263 case EPIPHANY_OPERAND_RM6 : 1264 value = fields->f_rm6; 1265 break; 1266 case EPIPHANY_OPERAND_RN : 1267 value = fields->f_rn; 1268 break; 1269 case EPIPHANY_OPERAND_RN6 : 1270 value = fields->f_rn6; 1271 break; 1272 case EPIPHANY_OPERAND_SD : 1273 value = fields->f_sd; 1274 break; 1275 case EPIPHANY_OPERAND_SD6 : 1276 value = fields->f_sd6; 1277 break; 1278 case EPIPHANY_OPERAND_SDDMA : 1279 value = fields->f_sd6; 1280 break; 1281 case EPIPHANY_OPERAND_SDMEM : 1282 value = fields->f_sd6; 1283 break; 1284 case EPIPHANY_OPERAND_SDMESH : 1285 value = fields->f_sd6; 1286 break; 1287 case EPIPHANY_OPERAND_SHIFT : 1288 value = fields->f_shift; 1289 break; 1290 case EPIPHANY_OPERAND_SIMM11 : 1291 value = fields->f_sdisp11; 1292 break; 1293 case EPIPHANY_OPERAND_SIMM24 : 1294 value = fields->f_simm24; 1295 break; 1296 case EPIPHANY_OPERAND_SIMM3 : 1297 value = fields->f_sdisp3; 1298 break; 1299 case EPIPHANY_OPERAND_SIMM8 : 1300 value = fields->f_simm8; 1301 break; 1302 case EPIPHANY_OPERAND_SN : 1303 value = fields->f_sn; 1304 break; 1305 case EPIPHANY_OPERAND_SN6 : 1306 value = fields->f_sn6; 1307 break; 1308 case EPIPHANY_OPERAND_SNDMA : 1309 value = fields->f_sn6; 1310 break; 1311 case EPIPHANY_OPERAND_SNMEM : 1312 value = fields->f_sn6; 1313 break; 1314 case EPIPHANY_OPERAND_SNMESH : 1315 value = fields->f_sn6; 1316 break; 1317 case EPIPHANY_OPERAND_SWI_NUM : 1318 value = fields->f_trap_num; 1319 break; 1320 case EPIPHANY_OPERAND_TRAPNUM6 : 1321 value = fields->f_trap_num; 1322 break; 1323 1324 default : 1325 /* xgettext:c-format */ 1326 opcodes_error_handler 1327 (_("internal error: unrecognized field %d while getting int operand"), 1328 opindex); 1329 abort (); 1330 } 1331 1332 return value; 1333 } 1334 1335 bfd_vma 1336 epiphany_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1337 int opindex, 1338 const CGEN_FIELDS * fields) 1339 { 1340 bfd_vma value; 1341 1342 switch (opindex) 1343 { 1344 case EPIPHANY_OPERAND_DIRECTION : 1345 value = fields->f_addsubx; 1346 break; 1347 case EPIPHANY_OPERAND_DISP11 : 1348 value = fields->f_disp11; 1349 break; 1350 case EPIPHANY_OPERAND_DISP3 : 1351 value = fields->f_disp3; 1352 break; 1353 case EPIPHANY_OPERAND_DPMI : 1354 value = fields->f_subd; 1355 break; 1356 case EPIPHANY_OPERAND_FRD : 1357 value = fields->f_rd; 1358 break; 1359 case EPIPHANY_OPERAND_FRD6 : 1360 value = fields->f_rd6; 1361 break; 1362 case EPIPHANY_OPERAND_FRM : 1363 value = fields->f_rm; 1364 break; 1365 case EPIPHANY_OPERAND_FRM6 : 1366 value = fields->f_rm6; 1367 break; 1368 case EPIPHANY_OPERAND_FRN : 1369 value = fields->f_rn; 1370 break; 1371 case EPIPHANY_OPERAND_FRN6 : 1372 value = fields->f_rn6; 1373 break; 1374 case EPIPHANY_OPERAND_IMM16 : 1375 value = fields->f_imm16; 1376 break; 1377 case EPIPHANY_OPERAND_IMM8 : 1378 value = fields->f_imm8; 1379 break; 1380 case EPIPHANY_OPERAND_RD : 1381 value = fields->f_rd; 1382 break; 1383 case EPIPHANY_OPERAND_RD6 : 1384 value = fields->f_rd6; 1385 break; 1386 case EPIPHANY_OPERAND_RM : 1387 value = fields->f_rm; 1388 break; 1389 case EPIPHANY_OPERAND_RM6 : 1390 value = fields->f_rm6; 1391 break; 1392 case EPIPHANY_OPERAND_RN : 1393 value = fields->f_rn; 1394 break; 1395 case EPIPHANY_OPERAND_RN6 : 1396 value = fields->f_rn6; 1397 break; 1398 case EPIPHANY_OPERAND_SD : 1399 value = fields->f_sd; 1400 break; 1401 case EPIPHANY_OPERAND_SD6 : 1402 value = fields->f_sd6; 1403 break; 1404 case EPIPHANY_OPERAND_SDDMA : 1405 value = fields->f_sd6; 1406 break; 1407 case EPIPHANY_OPERAND_SDMEM : 1408 value = fields->f_sd6; 1409 break; 1410 case EPIPHANY_OPERAND_SDMESH : 1411 value = fields->f_sd6; 1412 break; 1413 case EPIPHANY_OPERAND_SHIFT : 1414 value = fields->f_shift; 1415 break; 1416 case EPIPHANY_OPERAND_SIMM11 : 1417 value = fields->f_sdisp11; 1418 break; 1419 case EPIPHANY_OPERAND_SIMM24 : 1420 value = fields->f_simm24; 1421 break; 1422 case EPIPHANY_OPERAND_SIMM3 : 1423 value = fields->f_sdisp3; 1424 break; 1425 case EPIPHANY_OPERAND_SIMM8 : 1426 value = fields->f_simm8; 1427 break; 1428 case EPIPHANY_OPERAND_SN : 1429 value = fields->f_sn; 1430 break; 1431 case EPIPHANY_OPERAND_SN6 : 1432 value = fields->f_sn6; 1433 break; 1434 case EPIPHANY_OPERAND_SNDMA : 1435 value = fields->f_sn6; 1436 break; 1437 case EPIPHANY_OPERAND_SNMEM : 1438 value = fields->f_sn6; 1439 break; 1440 case EPIPHANY_OPERAND_SNMESH : 1441 value = fields->f_sn6; 1442 break; 1443 case EPIPHANY_OPERAND_SWI_NUM : 1444 value = fields->f_trap_num; 1445 break; 1446 case EPIPHANY_OPERAND_TRAPNUM6 : 1447 value = fields->f_trap_num; 1448 break; 1449 1450 default : 1451 /* xgettext:c-format */ 1452 opcodes_error_handler 1453 (_("internal error: unrecognized field %d while getting vma operand"), 1454 opindex); 1455 abort (); 1456 } 1457 1458 return value; 1459 } 1460 1461 void epiphany_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1462 void epiphany_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1463 1464 /* Stuffing values in cgen_fields is handled by a collection of functions. 1465 They are distinguished by the type of the VALUE argument they accept. 1466 TODO: floating point, inlining support, remove cases where argument type 1467 not appropriate. */ 1468 1469 void 1470 epiphany_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1471 int opindex, 1472 CGEN_FIELDS * fields, 1473 int value) 1474 { 1475 switch (opindex) 1476 { 1477 case EPIPHANY_OPERAND_DIRECTION : 1478 fields->f_addsubx = value; 1479 break; 1480 case EPIPHANY_OPERAND_DISP11 : 1481 fields->f_disp11 = value; 1482 break; 1483 case EPIPHANY_OPERAND_DISP3 : 1484 fields->f_disp3 = value; 1485 break; 1486 case EPIPHANY_OPERAND_DPMI : 1487 fields->f_subd = value; 1488 break; 1489 case EPIPHANY_OPERAND_FRD : 1490 fields->f_rd = value; 1491 break; 1492 case EPIPHANY_OPERAND_FRD6 : 1493 fields->f_rd6 = value; 1494 break; 1495 case EPIPHANY_OPERAND_FRM : 1496 fields->f_rm = value; 1497 break; 1498 case EPIPHANY_OPERAND_FRM6 : 1499 fields->f_rm6 = value; 1500 break; 1501 case EPIPHANY_OPERAND_FRN : 1502 fields->f_rn = value; 1503 break; 1504 case EPIPHANY_OPERAND_FRN6 : 1505 fields->f_rn6 = value; 1506 break; 1507 case EPIPHANY_OPERAND_IMM16 : 1508 fields->f_imm16 = value; 1509 break; 1510 case EPIPHANY_OPERAND_IMM8 : 1511 fields->f_imm8 = value; 1512 break; 1513 case EPIPHANY_OPERAND_RD : 1514 fields->f_rd = value; 1515 break; 1516 case EPIPHANY_OPERAND_RD6 : 1517 fields->f_rd6 = value; 1518 break; 1519 case EPIPHANY_OPERAND_RM : 1520 fields->f_rm = value; 1521 break; 1522 case EPIPHANY_OPERAND_RM6 : 1523 fields->f_rm6 = value; 1524 break; 1525 case EPIPHANY_OPERAND_RN : 1526 fields->f_rn = value; 1527 break; 1528 case EPIPHANY_OPERAND_RN6 : 1529 fields->f_rn6 = value; 1530 break; 1531 case EPIPHANY_OPERAND_SD : 1532 fields->f_sd = value; 1533 break; 1534 case EPIPHANY_OPERAND_SD6 : 1535 fields->f_sd6 = value; 1536 break; 1537 case EPIPHANY_OPERAND_SDDMA : 1538 fields->f_sd6 = value; 1539 break; 1540 case EPIPHANY_OPERAND_SDMEM : 1541 fields->f_sd6 = value; 1542 break; 1543 case EPIPHANY_OPERAND_SDMESH : 1544 fields->f_sd6 = value; 1545 break; 1546 case EPIPHANY_OPERAND_SHIFT : 1547 fields->f_shift = value; 1548 break; 1549 case EPIPHANY_OPERAND_SIMM11 : 1550 fields->f_sdisp11 = value; 1551 break; 1552 case EPIPHANY_OPERAND_SIMM24 : 1553 fields->f_simm24 = value; 1554 break; 1555 case EPIPHANY_OPERAND_SIMM3 : 1556 fields->f_sdisp3 = value; 1557 break; 1558 case EPIPHANY_OPERAND_SIMM8 : 1559 fields->f_simm8 = value; 1560 break; 1561 case EPIPHANY_OPERAND_SN : 1562 fields->f_sn = value; 1563 break; 1564 case EPIPHANY_OPERAND_SN6 : 1565 fields->f_sn6 = value; 1566 break; 1567 case EPIPHANY_OPERAND_SNDMA : 1568 fields->f_sn6 = value; 1569 break; 1570 case EPIPHANY_OPERAND_SNMEM : 1571 fields->f_sn6 = value; 1572 break; 1573 case EPIPHANY_OPERAND_SNMESH : 1574 fields->f_sn6 = value; 1575 break; 1576 case EPIPHANY_OPERAND_SWI_NUM : 1577 fields->f_trap_num = value; 1578 break; 1579 case EPIPHANY_OPERAND_TRAPNUM6 : 1580 fields->f_trap_num = value; 1581 break; 1582 1583 default : 1584 /* xgettext:c-format */ 1585 opcodes_error_handler 1586 (_("internal error: unrecognized field %d while setting int operand"), 1587 opindex); 1588 abort (); 1589 } 1590 } 1591 1592 void 1593 epiphany_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1594 int opindex, 1595 CGEN_FIELDS * fields, 1596 bfd_vma value) 1597 { 1598 switch (opindex) 1599 { 1600 case EPIPHANY_OPERAND_DIRECTION : 1601 fields->f_addsubx = value; 1602 break; 1603 case EPIPHANY_OPERAND_DISP11 : 1604 fields->f_disp11 = value; 1605 break; 1606 case EPIPHANY_OPERAND_DISP3 : 1607 fields->f_disp3 = value; 1608 break; 1609 case EPIPHANY_OPERAND_DPMI : 1610 fields->f_subd = value; 1611 break; 1612 case EPIPHANY_OPERAND_FRD : 1613 fields->f_rd = value; 1614 break; 1615 case EPIPHANY_OPERAND_FRD6 : 1616 fields->f_rd6 = value; 1617 break; 1618 case EPIPHANY_OPERAND_FRM : 1619 fields->f_rm = value; 1620 break; 1621 case EPIPHANY_OPERAND_FRM6 : 1622 fields->f_rm6 = value; 1623 break; 1624 case EPIPHANY_OPERAND_FRN : 1625 fields->f_rn = value; 1626 break; 1627 case EPIPHANY_OPERAND_FRN6 : 1628 fields->f_rn6 = value; 1629 break; 1630 case EPIPHANY_OPERAND_IMM16 : 1631 fields->f_imm16 = value; 1632 break; 1633 case EPIPHANY_OPERAND_IMM8 : 1634 fields->f_imm8 = value; 1635 break; 1636 case EPIPHANY_OPERAND_RD : 1637 fields->f_rd = value; 1638 break; 1639 case EPIPHANY_OPERAND_RD6 : 1640 fields->f_rd6 = value; 1641 break; 1642 case EPIPHANY_OPERAND_RM : 1643 fields->f_rm = value; 1644 break; 1645 case EPIPHANY_OPERAND_RM6 : 1646 fields->f_rm6 = value; 1647 break; 1648 case EPIPHANY_OPERAND_RN : 1649 fields->f_rn = value; 1650 break; 1651 case EPIPHANY_OPERAND_RN6 : 1652 fields->f_rn6 = value; 1653 break; 1654 case EPIPHANY_OPERAND_SD : 1655 fields->f_sd = value; 1656 break; 1657 case EPIPHANY_OPERAND_SD6 : 1658 fields->f_sd6 = value; 1659 break; 1660 case EPIPHANY_OPERAND_SDDMA : 1661 fields->f_sd6 = value; 1662 break; 1663 case EPIPHANY_OPERAND_SDMEM : 1664 fields->f_sd6 = value; 1665 break; 1666 case EPIPHANY_OPERAND_SDMESH : 1667 fields->f_sd6 = value; 1668 break; 1669 case EPIPHANY_OPERAND_SHIFT : 1670 fields->f_shift = value; 1671 break; 1672 case EPIPHANY_OPERAND_SIMM11 : 1673 fields->f_sdisp11 = value; 1674 break; 1675 case EPIPHANY_OPERAND_SIMM24 : 1676 fields->f_simm24 = value; 1677 break; 1678 case EPIPHANY_OPERAND_SIMM3 : 1679 fields->f_sdisp3 = value; 1680 break; 1681 case EPIPHANY_OPERAND_SIMM8 : 1682 fields->f_simm8 = value; 1683 break; 1684 case EPIPHANY_OPERAND_SN : 1685 fields->f_sn = value; 1686 break; 1687 case EPIPHANY_OPERAND_SN6 : 1688 fields->f_sn6 = value; 1689 break; 1690 case EPIPHANY_OPERAND_SNDMA : 1691 fields->f_sn6 = value; 1692 break; 1693 case EPIPHANY_OPERAND_SNMEM : 1694 fields->f_sn6 = value; 1695 break; 1696 case EPIPHANY_OPERAND_SNMESH : 1697 fields->f_sn6 = value; 1698 break; 1699 case EPIPHANY_OPERAND_SWI_NUM : 1700 fields->f_trap_num = value; 1701 break; 1702 case EPIPHANY_OPERAND_TRAPNUM6 : 1703 fields->f_trap_num = value; 1704 break; 1705 1706 default : 1707 /* xgettext:c-format */ 1708 opcodes_error_handler 1709 (_("internal error: unrecognized field %d while setting vma operand"), 1710 opindex); 1711 abort (); 1712 } 1713 } 1714 1715 /* Function to call before using the instruction builder tables. */ 1716 1717 void 1718 epiphany_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1719 { 1720 cd->insert_handlers = & epiphany_cgen_insert_handlers[0]; 1721 cd->extract_handlers = & epiphany_cgen_extract_handlers[0]; 1722 1723 cd->insert_operand = epiphany_cgen_insert_operand; 1724 cd->extract_operand = epiphany_cgen_extract_operand; 1725 1726 cd->get_int_operand = epiphany_cgen_get_int_operand; 1727 cd->set_int_operand = epiphany_cgen_set_int_operand; 1728 cd->get_vma_operand = epiphany_cgen_get_vma_operand; 1729 cd->set_vma_operand = epiphany_cgen_set_vma_operand; 1730 } 1731
Indexes created Sun Mar 01 05:31:48 UTC 2026