1 /* AArch64 ELF support for BFD. 2 3 Copyright (C) 2009-2026 Free Software Foundation, Inc. 4 Contributed by ARM Ltd. 5 6 This file is part of GNU Binutils. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the license, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; see the file COPYING3. If not, 20 see <http://www.gnu.org/licenses/>. */ 21 22 #ifndef _ELF_AARCH64_H 23 #define _ELF_AARCH64_H 24 25 #include "elf/reloc-macros.h" 26 27 /* Processor specific program header types. */ 28 #define PT_AARCH64_ARCHEXT (PT_LOPROC + 0) 29 30 /* MTE memory tag segment type. */ 31 #define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2) 32 33 /* Name of the ELF section holding the attributes. */ 34 #define SEC_AARCH64_ATTRIBUTES ".ARM.attributes" 35 /* Additional section types. */ 36 /* Section holds attributes. */ 37 #define SHT_AARCH64_ATTRIBUTES (SHT_LOPROC + 3) 38 /* Special aarch64-specific section for MTE support, as described in: 39 https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#section-types */ 40 #define SHT_AARCH64_AUTH_RELR (SHT_LOPROC + 4) 41 /* Special aarch64-specific sections for MTE support, as described in: 42 https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#7section-types */ 43 #define SHT_AARCH64_MEMTAG_GLOBALS_STATIC (SHT_LOPROC + 7) 44 #define SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC (SHT_LOPROC + 8) 45 46 /* AArch64-specific values for sh_flags. */ 47 #define SHF_ENTRYSECT 0x10000000 /* Section contains an 48 entry point. */ 49 #define SHF_COMDEF 0x80000000 /* Section may be multiply defined 50 in the input to a link step. */ 51 /* Processor specific dynamic array tags. */ 52 #define DT_AARCH64_BTI_PLT (DT_LOPROC + 1) 53 #define DT_AARCH64_PAC_PLT (DT_LOPROC + 3) 54 #define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5) 55 #define DT_AARCH64_MEMTAG_MODE (DT_LOPROC + 9) 56 #define DT_AARCH64_MEMTAG_STACK (DT_LOPROC + 12) 57 58 /* AArch64-specific values for st_other. */ 59 #define STO_AARCH64_VARIANT_PCS 0x80 /* Symbol may follow different call 60 convention from the base PCS. */ 61 62 /* Tags used in aeabi_feature_and_bits subsection. 63 See document 'Build Attributes for the Arm 64-bit Architecture (AArch64) 64 7.4 aeabi_feature_and_bits subsection'. */ 65 typedef enum Tag_Feature_Set { 66 Tag_Feature_BTI = 0, 67 Tag_Feature_PAC = 1, 68 Tag_Feature_GCS = 2, 69 } Tag_Feature_Set; 70 71 /* Tags used in aeabi_pauthabi subsection. 72 See document 'Build Attributes for the Arm 64-bit Architecture (AArch64) 73 7.5 Pointer Authentication Signing Schema. */ 74 typedef enum Tag_PAuth_Info { 75 Tag_PAuth_Platform = 1, 76 Tag_PAuth_Schema = 2, 77 } Tag_PAuth_Info; 78 79 /* Relocation types. */ 80 81 START_RELOC_NUMBERS (elf_aarch64_reloc_type) 82 83 /* Null relocations. */ 84 RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */ 85 86 /* Basic data relocations. */ 87 88 /* .word: (S+A) */ 89 RELOC_NUMBER (R_AARCH64_P32_ABS32, 1) 90 91 /* .half: (S+A) */ 92 RELOC_NUMBER (R_AARCH64_P32_ABS16, 2) 93 94 /* .word: (S+A-P) */ 95 RELOC_NUMBER (R_AARCH64_P32_PREL32, 3) 96 97 /* .half: (S+A-P) */ 98 RELOC_NUMBER (R_AARCH64_P32_PREL16, 4) 99 100 /* Group relocations to create a 16, 32, 48 or 64 bit 101 unsigned data or abs address inline. */ 102 103 /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ 104 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5) 105 106 /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ 107 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6) 108 109 /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ 110 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7) 111 112 /* Group relocations to create high part of a 16, 32, 48 or 64 bit 113 signed data or abs address inline. Will change instruction 114 to MOVN or MOVZ depending on sign of calculated value. */ 115 116 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */ 117 RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8) 118 119 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store 120 addresses: PG(x) is (x & ~0xfff). */ 121 122 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */ 123 RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9) 124 125 /* ADR: (S+A-P) & 0x1fffff */ 126 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10) 127 128 /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ 129 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11) 130 131 /* ADD: (S+A) & 0xfff */ 132 RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12) 133 134 /* LD/ST8: (S+A) & 0xfff */ 135 RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13) 136 137 /* LD/ST16: (S+A) & 0xffe */ 138 RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14) 139 140 /* LD/ST32: (S+A) & 0xffc */ 141 RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15) 142 143 /* LD/ST64: (S+A) & 0xff8 */ 144 RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16) 145 146 /* LD/ST128: (S+A) & 0xff0 */ 147 RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17) 148 149 /* Relocations for control-flow instructions. */ 150 151 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */ 152 RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18) 153 154 /* B.cond: ((S+A-P) >> 2) & 0x7ffff. */ 155 RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19) 156 157 /* B: ((S+A-P) >> 2) & 0x3ffffff. */ 158 RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20) 159 160 /* BL: ((S+A-P) >> 2) & 0x3ffffff. */ 161 RELOC_NUMBER (R_AARCH64_P32_CALL26, 21) 162 163 /* Group relocations to create a 16 or 32 bit PC-relative offset inline. */ 164 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22) 165 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23) 166 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24) 167 168 RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25) 169 RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26) 170 RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27) 171 RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28) 172 173 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80) 174 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81) 175 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82) 176 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83) 177 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84) 178 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85) 179 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87) 180 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88) 181 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89) 182 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90) 183 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91) 184 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92) 185 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103) 186 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104) 187 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105) 188 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106) 189 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107) 190 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108) 191 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109) 192 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110) 193 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111) 194 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112) 195 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113) 196 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114) 197 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115) 198 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116) 199 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117) 200 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118) 201 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119) 202 203 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122) 204 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123) 205 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124) 206 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125) 207 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126) 208 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127) 209 210 /* Dynamic relocations */ 211 212 /* Copy symbol at runtime. */ 213 RELOC_NUMBER (R_AARCH64_P32_COPY, 180) 214 215 /* Create GOT entry. */ 216 RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181) 217 218 /* Create PLT entry. */ 219 RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182) 220 221 /* Adjust by program base. */ 222 RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183) 223 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184) 224 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185) 225 RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186) 226 RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187) 227 RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188) 228 229 RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */ 230 231 /* Basic data relocations. */ 232 233 /* .xword: (S+A) */ 234 RELOC_NUMBER (R_AARCH64_ABS64, 257) 235 236 /* .word: (S+A) */ 237 RELOC_NUMBER (R_AARCH64_ABS32, 258) 238 239 /* .half: (S+A) */ 240 RELOC_NUMBER (R_AARCH64_ABS16, 259) 241 242 /* .xword: (S+A-P) */ 243 RELOC_NUMBER (R_AARCH64_PREL64, 260) 244 245 /* .word: (S+A-P) */ 246 RELOC_NUMBER (R_AARCH64_PREL32, 261) 247 248 /* .half: (S+A-P) */ 249 RELOC_NUMBER (R_AARCH64_PREL16, 262) 250 251 /* Group relocations to create a 16, 32, 48 or 64 bit 252 unsigned data or abs address inline. */ 253 254 /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ 255 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0, 263) 256 257 /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ 258 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264) 259 260 /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ 261 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265) 262 263 /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ 264 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266) 265 266 /* MOV[ZK]: ((S+A) >> 32) & 0xffff */ 267 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267) 268 269 /* MOV[ZK]: ((S+A) >> 32) & 0xffff */ 270 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268) 271 272 /* MOV[ZK]: ((S+A) >> 48) & 0xffff */ 273 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269) 274 275 /* Group relocations to create high part of a 16, 32, 48 or 64 bit 276 signed data or abs address inline. Will change instruction 277 to MOVN or MOVZ depending on sign of calculated value. */ 278 279 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */ 280 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270) 281 282 /* MOV[ZN]: ((S+A) >> 16) & 0xffff */ 283 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271) 284 285 /* MOV[ZN]: ((S+A) >> 32) & 0xffff */ 286 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272) 287 288 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store 289 addresses: PG(x) is (x & ~0xfff). */ 290 291 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */ 292 RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273) 293 294 /* ADR: (S+A-P) & 0x1fffff */ 295 RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274) 296 297 /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ 298 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275) 299 300 /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ 301 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276) 302 303 /* ADD: (S+A) & 0xfff */ 304 RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277) 305 306 /* LD/ST8: (S+A) & 0xfff */ 307 RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278) 308 309 /* Relocations for control-flow instructions. */ 310 311 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */ 312 RELOC_NUMBER (R_AARCH64_TSTBR14, 279) 313 314 /* B.cond: ((S+A-P) >> 2) & 0x7ffff. */ 315 RELOC_NUMBER (R_AARCH64_CONDBR19, 280) 316 317 /* 281 unused */ 318 319 /* B: ((S+A-P) >> 2) & 0x3ffffff. */ 320 RELOC_NUMBER (R_AARCH64_JUMP26, 282) 321 322 /* BL: ((S+A-P) >> 2) & 0x3ffffff. */ 323 RELOC_NUMBER (R_AARCH64_CALL26, 283) 324 325 /* LD/ST16: (S+A) & 0xffe */ 326 RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284) 327 328 /* LD/ST32: (S+A) & 0xffc */ 329 RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285) 330 331 /* LD/ST64: (S+A) & 0xff8 */ 332 RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286) 333 334 /* Group relocations to create a 16, 32, 48, or 64 bit PC-relative 335 offset inline. */ 336 337 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287) 338 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288) 339 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289) 340 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290) 341 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291) 342 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292) 343 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293) 344 345 /* LD/ST128: (S+A) & 0xff0 */ 346 RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299) 347 348 /* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative 349 offset inline. */ 350 351 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300) 352 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301) 353 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302) 354 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303) 355 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304) 356 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305) 357 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306) 358 359 /* GOT-relative data relocations. */ 360 361 RELOC_NUMBER (R_AARCH64_GOTREL64, 307) 362 RELOC_NUMBER (R_AARCH64_GOTREL32, 308) 363 364 /* GOT-relative instruction relocations. */ 365 366 RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309) 367 RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310) 368 RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311) 369 RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312) 370 RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313) 371 372 /* General Dynamic TLS relocations. */ 373 374 RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512) 375 RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513) 376 RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514) 377 RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515) 378 RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516) 379 380 /* Local Dynamic TLS relocations. */ 381 382 RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517) 383 RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518) 384 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519) 385 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520) 386 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521) 387 RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522) 388 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523) 389 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524) 390 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525) 391 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526) 392 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527) 393 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528) 394 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529) 395 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530) 396 RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531) 397 RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532) 398 RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533) 399 RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534) 400 RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535) 401 RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536) 402 RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537) 403 RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538) 404 405 /* Initial Exec TLS relocations. */ 406 407 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539) 408 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540) 409 RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541) 410 RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542) 411 RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543) 412 413 /* Local Exec TLS relocations. */ 414 415 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544) 416 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545) 417 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546) 418 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547) 419 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548) 420 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549) 421 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550) 422 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551) 423 RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552) 424 RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553) 425 RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554) 426 RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555) 427 RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556) 428 RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557) 429 RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558) 430 RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559) 431 432 /* TLS descriptor relocations. */ 433 434 RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560) 435 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561) 436 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562) 437 RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563) 438 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564) 439 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565) 440 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566) 441 RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567) 442 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568) 443 RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569) 444 445 RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570) 446 RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571) 447 RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572) 448 RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573) 449 450 /* Dynamic relocations */ 451 452 /* Copy symbol at runtime. */ 453 RELOC_NUMBER (R_AARCH64_COPY, 1024) 454 455 /* Create GOT entry. */ 456 RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025) 457 458 /* Create PLT entry. */ 459 RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026) 460 461 /* Adjust by program base. */ 462 RELOC_NUMBER (R_AARCH64_RELATIVE, 1027) 463 RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028) 464 RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029) 465 RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030) 466 /* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC 467 so that readelf.c won't generate duplicated case 468 statements. */ 469 #ifndef RELOC_MACROS_GEN_FUNC 470 RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028) 471 RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029) 472 RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030) 473 #endif 474 RELOC_NUMBER (R_AARCH64_TLSDESC, 1031) 475 RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032) 476 477 END_RELOC_NUMBERS (R_AARCH64_end) 478 479 #endif /* _ELF_AARCH64_H */ 480
Indexes created Mon Mar 02 05:31:46 UTC 2026