1 2025-07-13 Nick Clifton <nickc (a] redhat.com> 2 3 * 2.45 Branch point. 4 5 2025-01-19 Nick Clifton <nickc (a] redhat.com> 6 7 * 2.44 Branch point. 8 9 2024-07-20 Nick Clifton <nickc (a] redhat.com> 10 11 * 2.43 branch point. 12 13 2024-02-15 Will Hawkins <hawkinsw (a] obs.cr> 14 15 * bpf-opc.c: Move callx into the v1 BPF CPU variant. 16 17 2024-02-14 Yuriy Kolerov <ykolerov (a] synopsys.com> 18 19 * arc-tbl.h (dbnz): Use "DBNZ" class. 20 * arc-dis.c (arc_opcode_to_insn_type): Handle "DBNZ" class. 21 22 2024-01-29 Jose E. Marchesi <jose.marchesi (a] oracle.com> 23 24 * bpf-opc.c (bpf_opcodes): Remove BPF_INSN_LDINDDW and 25 BPF_INSN_LDABSDW instructions. 26 27 2024-01-15 Nick Clifton <nickc (a] redhat.com> 28 29 * configure: Regenerate. 30 * po/opcodes.pot: Regenerate. 31 32 2024-01-15 Nick Clifton <nickc (a] redhat.com> 33 34 * 2.42 branch point. 35 36 2023-11-15 Arsen Arsenovi <arsen (a] aarsen.me> 37 38 * aclocal.m4: Regenerate. 39 * po/Make-in ($(srcdir)/$(PACKAGE).pot): Output to a .pot 40 temporary file to suppress xgettext checking charset names. 41 * configure.ac (SHARED_LIBADD): Use LTLIBINTL rather than 42 LIBINTL. 43 * configure: Regenerate. 44 * po/Make-in ($(srcdir)/$(PACKAGE).pot): Output to a .pot 45 temporary file, to suppress xgettext checking charset names. 46 47 2023-10-05 Neal frager <neal.frager (a] amd.com> 48 49 * microblaze-opcm.h (struct op_code_struct): Tidy and remove 50 redundant entries. 51 * microblaze-opc.h (MAX_OPCODES): Increase to 300. 52 (op_code_struct): Add address extension instructions. 53 54 2023-10-04 Neal frager <neal.frager (a] amd.com> 55 56 * microblaze-opc.h (struct op_code_struct): Add hiberante 57 and suspend entries. 58 * microblaze-opcm.h (enum microblaze_instr): Add microblaze_sleep, 59 hibernate, suspend entries. 60 61 2023-08-24 Tom Tromey <tom (a] tromey.com> 62 63 * cgen.sh: Don't pass "-s" to cgen. 64 * Makefile.in: Rebuild. 65 * Makefile.am (GUILE): Simplify. 66 67 2023-07-31 Jose E. Marchesi <jose.marchesi (a] oracle.com> 68 69 PR 30705 70 * bpf-dis.c (print_insn_bpf): Check that info->section->owner is 71 actually available before using it. 72 73 2023-07-30 Jose E. Marchesi <jose.marchesi (a] oracle.com> 74 75 * bpf-dis.c: Initialize asm_bpf_version to -1. 76 (print_insn_bpf): Set BPF ISA version from the cpu version ELF 77 header flags if no explicit version set in the command line. 78 * disassemble.c (disassemble_init_for_target): Remove unused code. 79 80 2023-07-26 Jose E. Marchesi <jose.marchesi (a] oracle.com> 81 82 * bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src 83 register. 84 85 2023-07-24 Jose E. Marchesi <jose.marchesi (a] oracle.com> 86 87 * bpf-opc.c (bpf_opcodes): Add entries for the BSWAP* 88 instructions. 89 90 2023-07-24 Jose E. Marchesi <jose.marchesi (a] oracle.com> 91 92 * bpf-opc.c (bpf_opcodes): Fix pseudo-c syntax for MOVS* and LDXS* 93 instructions. 94 95 2023-07-23 Jose E. Marchesi <jose.marchesi (a] oracle.com> 96 97 * bpf-opc.c (bpf_opcodes): Add entry for jal. 98 99 2023-07-21 Jose E. Marchesi <jose.marchesi (a] oracle.com> 100 101 * bpf-opc.c (bpf_opcodes): Add entries for LDXS{B,W,H,DW} 102 instructions. 103 104 2023-07-21 Jose E. Marchesi <jose.marchesi (a] oracle.com> 105 106 * bpf-opc.c (bpf_opcodes): Add entries for MOVS{8,16,32}R and 107 MOVS32{8,16,32}R instructions. and MOVS32I instructions. 108 109 2023-07-21 Jose E. Marchesi <jose.marchesi (a] oracle.com> 110 111 * Makefile.am (TARGET64_LIBOPCODES_CFILES): Add missing bpf-dis.c 112 * Makefile.in: Regenerate. 113 114 2023-07-03 Nick Clifton <nickc (a] redhat.com> 115 116 * configure: Regenerate. 117 * po/opcodes.pot: Regenerate. 118 119 2023-07-03 Nick Clifton <nickc (a] redhat.com> 120 121 2.41 Branch Point. 122 123 2023-05-23 Nick Clifton <nickc (a] redhat.com> 124 125 * po/sv.po: Updated translation. 126 127 2023-04-21 Tom Tromey <tromey (a] adacore.com> 128 129 * i386-dis.c (OP_J): Check result of get16. 130 131 2023-04-12 Claudiu Zissulescu <claziss (a] synopsys.com> 132 133 * arc-tbl.h: Remove vadds2, vadds2h, vadds4h, vaddsubs, 134 vaddsubs2h, vaddsubs4h, vsubadds, vsubadds2h, vsubadds4h, vsubs2, 135 vsubs2h, and vsubs4h instructions. 136 137 2023-04-11 Nick Clifton <nickc (a] redhat.com> 138 139 PR 30310 140 * nfp-dis.c (init_nfp6000_priv): Check that the output section 141 exists. 142 143 2023-03-15 Nick Clifton <nickc (a] redhat.com> 144 145 PR 30231 146 * mep-dis.c: Regenerate. 147 148 2023-03-15 Nick Clifton <nickc (a] redhat.com> 149 150 PR 30230 151 * arm-dis.c (get_sym_code_type): Check for non-ELF symbols. 152 153 2023-02-28 Richard Ball <richard.ball (a] arm.com> 154 155 * aarch64-opc.c: Add MEC system registers. 156 157 2023-01-03 Nick Clifton <nickc (a] redhat.com> 158 159 * po/de.po: Updated German translation. 160 * po/ro.po: Updated Romainian translation. 161 * po/uk.po: Updated Ukrainian translation. 162 163 2022-12-31 Nick Clifton <nickc (a] redhat.com> 164 165 * 2.40 branch created. 166 167 2022-11-22 Shahab Vahedi <shahab (a] synopsys.com> 168 169 * arc-regs.h: Change isa_config address to 0xc1. 170 isa_config exists for ARC700 and ARCV2 and not ARCALL. 171 172 2022-10-31 Yoshinori Sato <ysato (a] users.sourceforge.jp> 173 174 * rx-decode.opc: Switch arguments of the MVTACGU insn. 175 * rx-decode.c: Regenerate. 176 177 2022-09-22 Yoshinori Sato <ysato (a] users.sourceforge.jp> 178 179 * sh-dis.c (print_insn_sh): Enforce bit7 of LDC Rm,Rn_BANK and STC 180 Rm_BANK,Rn is always 1. 181 182 2022-07-21 Peter Bergner <bergner (a] linux.ibm.com> 183 184 * ppc-opc.c (XACC_MASK, XX3ACC_MASK): New defines. 185 (P_GER_MASK, xxmfacc, xxmtacc, xxsetaccz, xvi8ger4pp, xvi8ger4, 186 xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, xvi4ger8pp, xvi4ger8, 187 xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, xvbf16ger2, xvf64gerpp, 188 xvf64ger, xvi16ger2, xvf16ger2np, xvf32gernp, xvi8ger4spp, xvi16ger2pp, 189 xvbf16ger2np, xvf64gernp, xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, 190 xvf64gerpn, xvf16ger2nn, xvf32gernn, xvbf16ger2nn, xvf64gernn: Use them. 191 192 2022-07-18 Claudiu Zissulescu <claziss (a] synopsys.com> 193 194 * disassemble.c (disassemble_init_for_target): Set 195 created_styled_output for ARC based targets. 196 * arc-dis.c (find_format_from_table): Use fprintf_styled_ftype 197 instead of fprintf_ftype throughout. 198 (find_format): Likewise. 199 (print_flags): Likewise. 200 (print_insn_arc): Likewise. 201 202 2022-07-08 Nick Clifton <nickc (a] redhat.com> 203 204 * 2.39 branch created. 205 206 2022-07-04 Marcus Nilsson <brainbomb (a] gmail.com> 207 208 * disassemble.c: (disassemble_init_for_target): Set 209 created_styled_output for AVR based targets. 210 * avr-dis.c: (print_insn_avr): Use fprintf_styled_ftype 211 instead of fprintf_ftype throughout. 212 (avr_operand): Pass in and fill disassembler_style when 213 parsing operands. 214 215 2022-04-07 Andreas Krebbel <krebbel (a] linux.ibm.com> 216 217 * s390-mkopc.c (main): Enable z16 as CPU string in the opcode 218 table. 219 220 2022-03-16 Simon Marchi <simon.marchi (a] efficios.com> 221 222 * configure.ac: Handle bfd_amdgcn_arch. 223 * configure: Re-generate. 224 225 2022-03-06 Sagar Patel <sagarmp (a] cs.unc.edu> 226 Maciej W. Rozycki <macro (a] orcam.me.uk> 227 228 * mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation 229 for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions. 230 * micromips-opc.c (micromips_opcodes): Likewise for "beqz" and 231 "bnez" instructions. 232 233 2022-02-17 Nick Clifton <nickc (a] redhat.com> 234 235 * po/sr.po: Updated Serbian translation. 236 237 2022-02-14 Sergei Trofimovich <siarheit (a] google.com> 238 239 * microblaze-opcm.h: Renamed 'fsqrt' to 'microblaze_fsqrt'. 240 * microblaze-opc.h: Follow 'fsqrt' rename. 241 242 2022-01-24 Nick Clifton <nickc (a] redhat.com> 243 244 * po/ro.po: Updated Romanian translation. 245 * po/uk.po: Updated Ukranian translation. 246 247 2022-01-22 Nick Clifton <nickc (a] redhat.com> 248 249 * configure: Regenerate. 250 * po/opcodes.pot: Regenerate. 251 252 2022-01-22 Nick Clifton <nickc (a] redhat.com> 253 254 * 2.38 release branch created. 255 256 2022-01-17 Nick Clifton <nickc (a] redhat.com> 257 258 * Makefile.in: Regenerate. 259 * po/opcodes.pot: Regenerate. 260 261 2021-12-02 Marcus Nilsson <brainbomb (a] gmail.com> 262 263 * avr-dis.c (avr_operand); Pass in disassemble_info and fill 264 in insn_type on branching instructions. 265 266 2021-11-25 Andrew Burgess <aburgess (a] redhat.com> 267 Simon Cook <simon.cook (a] embecosm.com> 268 269 * riscv-dis.c (enum riscv_option_arg_t): New enum typedef. 270 (riscv_options): New static global. 271 (disassembler_options_riscv): New function. 272 (print_riscv_disassembler_options): Rewrite to use 273 disassembler_options_riscv. 274 275 2021-11-25 Nick Clifton <nickc (a] redhat.com> 276 277 PR 28614 278 * aarch64-asm.c: Replace assert(0) with real code. 279 * aarch64-dis.c: Likewise. 280 * aarch64-opc.c: Likewise. 281 282 2021-11-25 Nick Clifton <nickc (a] redhat.com> 283 284 * po/fr.po; Updated French translation. 285 286 2021-10-27 Maciej W. Rozycki <macro (a] embecosm.com> 287 288 * Makefile.am: Remove obsolete comment. 289 * configure.ac: Refer `libbfd.la' to link shared BFD library 290 except for Cygwin. 291 * Makefile.in: Regenerate. 292 * configure: Regenerate. 293 294 2021-09-27 Nick Alcock <nick.alcock (a] oracle.com> 295 296 * configure: Regenerate. 297 298 2021-09-25 Peter Bergner <bergner (a] linux.ibm.com> 299 300 * ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable 301 on POWER5 and later. 302 303 2021-09-20 Andrew Burgess <andrew.burgess (a] embecosm.com> 304 305 * riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode 306 before an unknown instruction, '%d' is replaced with the 307 instruction length. 308 309 2021-09-02 Nick Clifton <nickc (a] redhat.com> 310 311 PR 28292 312 * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place 313 of BFD_RELOC_16. 314 315 2021-08-17 Shahab Vahedi <shahab (a] synopsys.com> 316 317 * arc-regs.h (DEF): Fix the register numbers. 318 319 2021-08-10 Nick Clifton <nickc (a] redhat.com> 320 321 * po/sr.po: Updated Serbian translation. 322 323 2021-07-26 Chenghua Xu <xuchenghua (a] loongson.cn> 324 325 * mips-dis.c (mips_arch_choices): Correct gs264e bfd_mach. 326 327 2021-06-07 Andreas Krebbel <krebbel (a] linux.ibm.com> 328 329 * s390-opc.txt: Add qpaci. 330 331 2021-07-03 Nick Clifton <nickc (a] redhat.com> 332 333 * configure: Regenerate. 334 * po/opcodes.pot: Regenerate. 335 336 2021-07-03 Nick Clifton <nickc (a] redhat.com> 337 338 * 2.37 release branch created. 339 340 2021-07-02 Alan Modra <amodra (a] gmail.com> 341 342 * nds32-dis.c (nds32_find_reg_keyword): Constify arg and return. 343 (nds32_parse_audio_ext, nds32_parse_opcode): Constify psys_reg. 344 (nds32_field_table, nds32_opcode_table, nds32_keyword_table), 345 (nds32_opcodes, nds32_operand_fields, nds32_keywords), 346 (nds32_keyword_gpr): Move declarations to.. 347 * nds32-asm.h: ..here, constifying to match definitions. 348 349 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 350 351 * Makefile.am (GUILE): New variable. 352 (CGEN): Use $(GUILE). 353 * Makefile.in: Regenerate. 354 355 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 356 357 * mep-asm.c (macros): Mark static & const. 358 (lookup_macro): Change return & m to const. 359 (expand_macro): Change mac to const. 360 (expand_string): Change pmacro to const. 361 362 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 363 364 * nds32-asm.c (operand_fields): Rename to ... 365 (nds32_operand_fields): ... this. 366 (keyword_gpr): Rename to ... 367 (nds32_keyword_gpr): ... this. 368 (keyword_usr, keyword_dxr, keyword_sr, keyword_cp, keyword_cpr, 369 keyword_fsr, keyword_fdr, keyword_abdim, keyword_abm, 370 keyword_dpref_st, keyword_cctl_lv, keyword_standby_st, 371 keyword_msync_st, keyword_im5_i, keyword_im5_m, keyword_accumulator, 372 keyword_aridx, keyword_aridx2, keyword_aridxi, keyword_aridxi_mx): 373 Mark static. 374 (keywords): Rename to ... 375 (nds32_keywords): ... this. 376 * nds32-dis.c: Rename operand_fields to nds32_operand_fields, 377 keywords to nds32_keywords, and keyword_gpr to nds32_keyword_gpr. 378 379 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 380 381 * z80-dis.c (opc_ed): Make const. 382 (pref_ed): Make p const. 383 384 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 385 386 * microblaze-dis.c (get_field_special): Make op const. 387 (read_insn_microblaze): Make opr & op const. Rename opcodes to 388 microblaze_opcodes. 389 (print_insn_microblaze): Make op & pop const. 390 (get_insn_microblaze): Make op const. Rename opcodes to 391 microblaze_opcodes. 392 (microblaze_get_target_address): Likewise. 393 * microblaze-opc.h (struct op_code_struct): Make const. 394 Rename opcodes to microblaze_opcodes. 395 396 2021-07-01 Mike Frysinger <vapier (a] gentoo.org> 397 398 * aarch64-gen.c (aarch64_opcode_table): Add const. 399 * aarch64-tbl.h (aarch64_opcode_table): Likewise. 400 401 2021-06-22 Andrew Burgess <andrew.burgess (a] embecosm.com> 402 403 * cgen-dis.c (count_decodable_bits): Use __builtin_popcount when 404 available. 405 406 2021-06-22 Alan Modra <amodra (a] gmail.com> 407 408 * pj-dis.c (print_insn_pj): Don't print trailing tab. Do 409 print separator for pcrel insns. 410 411 2021-06-19 Alan Modra <amodra (a] gmail.com> 412 413 * vax-dis.c (print_insn_vax): Avoid pointer overflow. 414 415 2021-06-19 Alan Modra <amodra (a] gmail.com> 416 417 * tic30-dis.c (get_register_operand): Don't ask strncpy to fill 418 entire buffer. 419 420 2021-06-17 Alan Modra <amodra (a] gmail.com> 421 422 * ppc-opc.c (powerpc_opcodes): Move cell db*cyc to proper location 423 in table. 424 425 2021-06-03 Alan Modra <amodra (a] gmail.com> 426 427 PR 1202 428 * mcore-dis.c (print_insn_mcore): Correct loopt disassembly. 429 Use unsigned int for inst. 430 431 2021-06-02 Shahab Vahedi <shahab (a] synopsys.com> 432 433 * arc-dis.c (arc_option_arg_t): New enumeration. 434 (arc_options): New variable. 435 (disassembler_options_arc): New function. 436 (print_arc_disassembler_options): Reimplement in terms of 437 "disassembler_options_arc". 438 439 2021-05-29 Alan Modra <amodra (a] gmail.com> 440 441 * ppc-dis.c (lookup_powerpc): Test deprecated field when -Many. 442 Don't special case PPC_OPCODE_RAW. 443 (lookup_prefix): Likewise. 444 (lookup_vle, lookup_spe2): Similarly. Add dialect parameter and.. 445 (print_insn_powerpc): ..update caller. 446 * ppc-opc.c (EXT): Define. 447 (powerpc_opcodes): Mark extended mnemonics with EXT. 448 (prefix_opcodes, vle_opcodes): Likewise. 449 (XISEL, XISEL_MASK): Add cr field and simplify. 450 (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort 451 all isel variants to where the base mnemonic belongs. Sort dstt, 452 dststt and dssall. 453 454 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 455 456 * mips-opc.c (mips_builtin_opcodes): Reorder legacy COP0, COP2, 457 COP3 opcode instructions. 458 459 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 460 461 * mips-opc.c (mips_builtin_opcodes): Update exclusion list for 462 "ldc2", "ldc3", "lwc0", "lwc2", "lwc3", "sdc2", "sdc3", "swc0", 463 "swc2", "swc3", "cfc0", "ctc0", "bc2f", "bc2fl", "bc2t", 464 "bc2tl", "cfc2", "ctc2", "dmfc2", "dmtc2", "mfc2", "mtc2", 465 "bc3f", "bc3fl", "bc3t", "bc3tl", "cfc3", "ctc3", "mfc3", 466 "mtc3", "bc0f", "bc0fl", "bc0t", "bc0tl", "rfe", "c2", "c3", 467 "cop2", and "cop3" entries. 468 469 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 470 471 * mips-opc.c (mips_builtin_opcodes): Remove "dmfc3" and "dmtc3" 472 entries and associated comments. 473 474 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 475 476 * mips-opc.c (mips_builtin_opcodes): Move the "rfe" entry ahead 477 of "c0". 478 479 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 480 481 * mips-dis.c (mips_cp1_names_mips): New variable. 482 (mips_arch_choices): Use it rather than `mips_cp1_names_numeric' 483 for "r3000", "r4000", "r4010", "vr4100", "vr4111", "vr4120", 484 "r4300", "r4400", "r4600", "r4650", "r5000", "vr5400", "vr5500", 485 "r5900", "r6000", "rm7000", "rm9000", "r8000", "r10000", 486 "r12000", "r14000", "r16000", "mips5", "loongson2e", and 487 "loongson2f". 488 489 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 490 491 * mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register 492 handling code over to... 493 <OP_REG_CONTROL>: ... this new case. 494 * mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases. 495 (mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2", 496 "cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries 497 replacing the `G' operand code with `g'. Update "cftc1" and 498 "cftc2" entries replacing the `E' operand code with `y'. 499 * micromips-opc.c (decode_micromips_operand) <'g'>: New case. 500 (micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2" 501 entries replacing the `G' operand code with `g'. 502 503 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 504 505 * mips-dis.c (mips_cp0_names_r3900): New variable. 506 (mips_arch_choices): Use it rather than `mips_cp0_names_numeric' 507 for "r3900". 508 509 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 510 511 * mips-opc.c (mips_builtin_opcodes): Switch "cttc2", "mttc2", 512 and "mtthc2" to using the `G' rather than `g' operand code for 513 the coprocessor control register referred. 514 515 2021-05-29 Maciej W. Rozycki <macro (a] orcam.me.uk> 516 517 * micromips-opc.c (micromips_opcodes): Swap the two "dmtc1" 518 entries with each other. 519 520 2021-05-27 Peter Bergner <bergner (a] linux.ibm.com> 521 522 * ppc-opc.c (powerpc_opcodes) <xxmr, xxlnot>: New extended mnemonics. 523 524 2021-05-25 Alan Modra <amodra (a] gmail.com> 525 526 * cris-desc.c: Regenerate. 527 * cris-desc.h: Regenerate. 528 * cris-opc.h: Regenerate. 529 * po/POTFILES.in: Regenerate. 530 531 2021-05-24 Mike Frysinger <vapier (a] gentoo.org> 532 533 * Makefile.am (HFILES): Add cris-desc.h & cris-opc.h. 534 (TARGET_LIBOPCODES_CFILES): Add cris-desc.c. 535 (CGEN_CPUS): Add cris. 536 (CRIS_DEPS): Define. 537 (stamp-cris): New rule. 538 * cgen.sh: Handle desc action. 539 * configure.ac (bfd_cris_arch): Add cris-desc.lo. 540 * Makefile.in, configure: Regenerate. 541 542 2021-05-18 Job Noorman <mtvec (a] pm.me> 543 544 PR 27814 545 * riscv-dis.c (riscv_get_disassembler): Get elf attributes only for 546 the elf objects. 547 548 2021-05-17 Alex Coplan <alex.coplan (a] arm.com> 549 550 * arm-dis.c (mve_opcodes): Fix disassembly of 551 MVE_VMOV2_GP_TO_VEC_LANE when idx == 1. 552 (is_mve_encoding_conflict): MVE vector loads should not match 553 when P = W = 0. 554 (is_mve_unpredictable): It's not unpredictable to use the same 555 source register twice (for MVE_VMOV2_GP_TO_VEC_LANE). 556 557 2021-05-11 Nick Clifton <nickc (a] redhat.com> 558 559 PR 27840 560 * tic30-dis.c (print_insn_tic30): Prevent attempts to read beyond 561 the end of the code buffer. 562 563 2021-05-06 Stafford Horne <shorne (a] gmail.com> 564 565 PR 21464 566 * or1k-asm.c: Regenerate. 567 568 2021-05-01 Max Filippov <jcmvbkbc (a] gmail.com> 569 570 * xtensa-dis.c (print_insn_xtensa): Fill in info->insn_type and 571 info->insn_info_valid. 572 573 2021-04-26 Jan Beulich <jbeulich (a] suse.com> 574 575 * i386-opc.tbl (lea): Add Optimize. 576 * opcodes/i386-tbl.h: Re-generate. 577 578 2020-04-23 Max Filippov <jcmvbkbc (a] gmail.com> 579 580 * xtensa-dis.c (print_xtensa_operand): For PC-relative operand 581 of l32r fetch and display referenced literal value. 582 583 2021-04-23 Max Filippov <jcmvbkbc (a] gmail.com> 584 585 * xtensa-dis.c (print_insn_xtensa): Set info->bytes_per_chunk 586 to 4 for literal disassembly. 587 588 2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus (a] arm.com> 589 590 * aarch64-opc.c: Add new registers (RPAOS, RPALOS, PAALLOS, PAALL) support 591 for TLBI instruction. 592 593 2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus (a] arm.com> 594 595 * aarch64-opc.c: Add new register (CIPAPA, CIGDPAPA) support for 596 DC instruction. 597 598 2021-04-19 Jan Beulich <jbeulich (a] suse.com> 599 600 * aarch64-asm.c (encode_asimd_fcvt): Add initializer for 601 "qualifier". 602 (convert_mov_to_movewide): Add initializer for "value". 603 604 2021-04-16 Przemyslaw Wirkus <przemyslaw.wirkus (a] arm.com> 605 606 * aarch64-opc.c: Add RME system registers. 607 608 2021-04-16 Lifang Xia <lifang_xia (a] c-sky.com> 609 610 * riscv-opc.c (riscv_opcodes): New insn alias for addi. Compress 611 "addi d,CV,z" to "c.mv d,CV". 612 613 2021-04-12 Alan Modra <amodra (a] gmail.com> 614 615 * configure.ac (--enable-checking): Add support. 616 * config.in: Regenerate. 617 * configure: Regenerate. 618 619 2021-04-09 Tejas Belagod <tejas.belagod (a] arm.com> 620 621 * aarch64-tbl.h (struct aarch64_opcode aarch64_opcode_table): Reclassify 622 LD64/ST64 instructions to lse_atomic instead of ldstexcl. 623 624 2021-04-09 Alan Modra <amodra (a] gmail.com> 625 626 * ppc-dis.c (struct dis_private): Add "special". 627 (POWERPC_DIALECT): Delete. Replace uses with.. 628 (private_data): ..this. New inline function. 629 (disassemble_init_powerpc): Init "special" names. 630 (skip_optional_operands): Add is_pcrel arg, set when detecting R 631 field of prefix instructions. 632 (bsearch_reloc, print_got_plt): New functions. 633 (print_insn_powerpc): For pcrel instructions, print target address 634 and symbol if known, and decode plt and got loads too. 635 636 2021-04-08 Alan Modra <amodra (a] gmail.com> 637 638 PR 27684 639 * ppc-opc.c (powerpc_opcodes): Correct usprg typos, add mfpir. 640 641 2021-04-08 Alan Modra <amodra (a] gmail.com> 642 643 PR 27676 644 * ppc-opc.c (DCBT_EO): Move earlier. 645 (insert_thct, extract_thct, insert_thds, extract_thds): New functions. 646 (powerpc_operands): Add THCT and THDS entries. 647 (powerpc_opcodes): Add dcbtstct, dcbtstds, dcbna, dcbtct, dcbtds. 648 649 2021-04-06 Alan Modra <amodra (a] gmail.com> 650 651 * dis-buf.c (generic_symbol_at_address): Return symbol* NULL. 652 * s12z-dis.c (decode_possible_symbol): Use symbol returned from 653 symbol_at_address_func. 654 655 2021-04-05 Alan Modra <amodra (a] gmail.com> 656 657 * configure.ac: Don't check for limits.h, string.h, strings.h or 658 stdlib.h. 659 (AC_ISC_POSIX): Don't invoke. 660 * sysdep.h: Include stdlib.h and string.h unconditionally. 661 * i386-opc.h: Include limits.h unconditionally. 662 * wasm32-dis.c: Likewise. 663 * cgen-opc.c: Don't include alloca-conf.h. 664 * config.in: Regenerate. 665 * configure: Regenerate. 666 667 2021-04-01 Martin Liska <mliska (a] suse.cz> 668 669 * arm-dis.c (strneq): Remove strneq and use startswith. 670 * cr16-dis.c (print_insn_cr16): Likewise. 671 * score-dis.c (streq): Likewise. 672 (strneq): Likewise. 673 * score7-dis.c (strneq): Likewise. 674 675 2021-04-01 Alan Modra <amodra (a] gmail.com> 676 677 PR 27675 678 * ppc-opc.c (powerpc_opcodes): Add mfummcr2 and mfmmcr2. 679 680 2021-03-31 Alan Modra <amodra (a] gmail.com> 681 682 * sysdep.h (POISON_BFD_BOOLEAN): Define. 683 * aarch64-asm-2.c, * aarch64-asm.c, * aarch64-asm.h, 684 * aarch64-dis-2.c, * aarch64-dis.c, * aarch64-dis.h, 685 * aarch64-gen.c, * aarch64-opc.c, * aarch64-opc.h, * arc-dis.c, 686 * arc-dis.h, * arc-fxi.h, * arc-opc.c, * arm-dis.c, * bfin-dis.c, 687 * cris-dis.c, * csky-dis.c, * csky-opc.h, * dis-buf.c, 688 * disassemble.c, * frv-opc.c, * frv-opc.h, * h8300-dis.c, 689 * i386-dis.c, * m68k-dis.c, * metag-dis.c, * microblaze-dis.c, 690 * microblaze-dis.h, * micromips-opc.c, * mips-dis.c, 691 * mips-formats.h, * mips-opc.c, * mips16-opc.c, * mmix-dis.c, 692 * msp430-dis.c, * nds32-dis.c, * nfp-dis.c, * nios2-dis.c, 693 * ppc-dis.c, * riscv-dis.c, * score-dis.c, * score7-dis.c, 694 * tic6x-dis.c, * v850-dis.c, * vax-dis.c, * wasm32-dis.c, 695 * xtensa-dis.c: Replace bfd_boolean with bool, FALSE with false, 696 and TRUE with true throughout. 697 698 2021-03-31 Alan Modra <amodra (a] gmail.com> 699 700 * aarch64-dis.c: Include stdint.h in place of bfd_stdint.h. 701 * aarch64-dis.h: Likewise. 702 * aarch64-opc.c: Likewise. 703 * avr-dis.c: Likewise. 704 * csky-dis.c: Likewise. 705 * nds32-asm.c: Likewise. 706 * nds32-dis.c: Likewise. 707 * nfp-dis.c: Likewise. 708 * riscv-dis.c: Likewise. 709 * s12z-dis.c: Likewise. 710 * wasm32-dis.c: Likewise. 711 712 2021-03-30 Jan Beulich <jbeulich (a] suse.com> 713 714 * i386-opc.c (cs, ds, ss, es, fs, gs): Delete. 715 (i386_seg_prefixes): New. 716 * i386-opc.h (cs, ds, ss, es, fs, gs): Delete. 717 (i386_seg_prefixes): Declare. 718 719 2021-03-30 Jan Beulich <jbeulich (a] suse.com> 720 721 * i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Delete. 722 723 2021-03-30 Jan Beulich <jbeulich (a] suse.com> 724 725 * i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Adjust values. 726 * i386-reg.tbl (st): Move down. 727 (st(0)): Delete. Extend comment. 728 * i386-tbl.h: Re-generate. 729 730 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 731 732 * i386-opc.tbl (movq, movabs): Move next to mov counterparts. 733 (cmpsd): Move next to cmps. 734 (movsd): Move next to movs. 735 (cmpxchg16b): Move to separate section. 736 (fisttp, fisttpll): Likewise. 737 (monitor, mwait): Likewise. 738 * i386-tbl.h: Re-generate. 739 740 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 741 742 * i386-opc.tbl (psadbw): Add <sse2:comm>. 743 (vpsadbw): Add C. 744 * i386-tbl.h: Re-generate. 745 746 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 747 748 * i386-opc.tbl (mmx, sse, sse2, sse3, ssse3, sse41, sse42, aes, 749 pclmul, gfni): New templates. Use them wherever possible. Move 750 SSE4.1 pextrw into respective section. 751 * i386-tbl.h: Re-generate. 752 753 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 754 755 * i386-gen.c (output_i386_opcode): Widen type of "opcode". Use 756 strtoull(). Bump upper loop bound. Widen masks. Sanity check 757 "length". 758 * i386-opc.tbl (Prefix_0X66, Prefix_0XF2, Prefix_0XF3): Delete. 759 Convert all of their uses to representation in opcode. 760 761 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 762 763 * i386-opc.h (struct insn_template): Shrink base_opcode to 16 764 bits. Shrink extension_opcode to 9 bits. Make it signed. Change 765 value of None. Shrink operands to 3 bits. 766 767 2021-03-29 Jan Beulich <jbeulich (a] suse.com> 768 769 * i386-gen.c (process_i386_opcode_modifier): New parameter 770 "space". 771 (output_i386_opcode): New local variable "space". Adjust 772 process_i386_opcode_modifier() invocation. 773 (process_i386_opcodes): Adjust process_i386_opcode_modifier() 774 invocation. 775 * i386-tbl.h: Re-generate. 776 777 2021-03-29 Alan Modra <amodra (a] gmail.com> 778 779 * aarch64-opc.c (vector_qualifier_p): Simplify boolean expression. 780 (fp_qualifier_p, get_data_pattern): Likewise. 781 (aarch64_get_operand_modifier_from_value): Likewise. 782 (aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise. 783 (operand_variant_qualifier_p): Likewise. 784 (qualifier_value_in_range_constraint_p): Likewise. 785 (aarch64_get_qualifier_esize): Likewise. 786 (aarch64_get_qualifier_nelem): Likewise. 787 (aarch64_get_qualifier_standard_value): Likewise. 788 (get_lower_bound, get_upper_bound): Likewise. 789 (aarch64_find_best_match, match_operands_qualifier): Likewise. 790 (aarch64_print_operand): Likewise. 791 * aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise. 792 (operand_need_sign_extension, operand_need_shift_by_two): Likewise. 793 (operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise. 794 * arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise. 795 * tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise. 796 (print_insn_tic6x): Likewise. 797 798 2021-03-29 Alan Modra <amodra (a] gmail.com> 799 800 * arc-dis.c (extract_operand_value): Correct NULL cast. 801 * frv-opc.h: Regenerate. 802 803 2021-03-26 Jan Beulich <jbeulich (a] suse.com> 804 805 * i386-opc.tbl (movq): Add CpuSSE2 to SSE2 form. Add CpuMMX to 806 MMX form. 807 * i386-tbl.h: Re-generate. 808 809 2021-03-25 Abid Qadeer <abidh (a] codesourcery.com> 810 811 * nios2-dis.c (nios2_print_insn_arg): Fix sign extension of 812 immediate in br.n instruction. 813 814 2021-03-25 Jan Beulich <jbeulich (a] suse.com> 815 816 * i386-dis.c (XMGatherD, VexGatherD): New. 817 (vex_table): Use VexGatherD for vpgatherd* and vgatherdp*. 818 (print_insn): Check masking for S/G insns. 819 (OP_E_memory): New local variable check_gather. Extend mandatory 820 SIB check. Check register conflicts for (EVEX-encoded) gathers. 821 Extend check for disallowed 16-bit addressing. 822 (OP_VEX): New local variables modrm_reg and sib_index. Convert 823 if()s to switch(). Check register conflicts for (VEX-encoded) 824 gathers. Drop no longer reachable cases. 825 * i386-dis-evex.h (evex_table): Use XMGatherD for vpgatherd* and 826 vgatherdp*. 827 828 2021-03-25 Jan Beulich <jbeulich (a] suse.com> 829 830 * i386-dis.c (print_insn): Mark as bad EVEX encodings specifying 831 zeroing-masking without masking. 832 833 2021-03-25 Jan Beulich <jbeulich (a] suse.com> 834 835 * i386-opc.tbl (invlpgb): Fix multi-operand form. 836 (pvalidate, rmpupdate, rmpadjust): Add multi-operand forms. Mark 837 single-operand forms as deprecated. 838 * i386-tbl.h: Re-generate. 839 840 2021-03-25 Alan Modra <amodra (a] gmail.com> 841 842 PR 27647 843 * ppc-opc.c (XLOCB_MASK): Delete. 844 (XLBOBB_MASK, XLBOBIBB_MASK, XLBOCBBB_MASK): Define using 845 XLBH_MASK. 846 (powerpc_opcodes): Accept a BH field on all extended forms of 847 bclr, bclrl, bcctr, bcctrl, bctar, bctarl. 848 849 2021-03-24 Jan Beulich <jbeulich (a] suse.com> 850 851 * i386-gen.c (output_i386_opcode): Drop processing of 852 opcode_length. Calculate length from base_opcode. Adjust prefix 853 encoding determination. 854 (process_i386_opcodes): Drop output of fake opcode_length. 855 * i386-opc.h (struct insn_template): Drop opcode_length field. 856 * i386-opc.tbl: Drop opcode length field from all templates. 857 * i386-tbl.h: Re-generate. 858 859 2021-03-24 Jan Beulich <jbeulich (a] suse.com> 860 861 * i386-gen.c (process_i386_opcode_modifier): Return void. New 862 parameter "prefix". Drop local variable "regular_encoding". 863 Record prefix setting / check for consistency. 864 (output_i386_opcode): Parse opcode_length and base_opcode 865 earlier. Derive prefix encoding. Drop no longer applicable 866 consistency checking. Adjust process_i386_opcode_modifier() 867 invocation. 868 (process_i386_opcodes): Adjust process_i386_opcode_modifier() 869 invocation. 870 * i386-tbl.h: Re-generate. 871 872 2021-03-24 Jan Beulich <jbeulich (a] suse.com> 873 874 * i386-gen.c (process_i386_opcode_modifier): Drop IsPrefix 875 check. 876 * i386-opc.h (Prefix_*): Move #define-s. 877 * i386-opc.tbl: Move pseudo prefix enumerator values to 878 extension opcode field. Introduce pseudopfx template. 879 * i386-tbl.h: Re-generate. 880 881 2021-03-23 Jan Beulich <jbeulich (a] suse.com> 882 883 * i386-opc.h (PREFIX_0XF2, PREFIX_0XF3): Excahnge values. Extend 884 comment. 885 * i386-tbl.h: Re-generate. 886 887 2021-03-23 Jan Beulich <jbeulich (a] suse.com> 888 889 * i386-opc.h (struct insn_template): Move cpu_flags field past 890 opcode_modifier one. 891 * i386-tbl.h: Re-generate. 892 893 2021-03-23 Jan Beulich <jbeulich (a] suse.com> 894 895 * i386-gen.c (opcode_modifiers): New OpcodeSpace element. 896 * i386-opc.h (OpcodeSpace): New enumerator. 897 (VEX0F, VEX0F38, VEX0F3A, XOP08, XOP09, XOP0A): Rename to ... 898 (SPACE_BASE, SPACE_0F, SPACE_0F38, SPACE_0F3A, SPACE_XOP08, 899 SPACE_XOP09, SPACE_XOP0A): ... respectively. 900 (struct i386_opcode_modifier): New field opcodespace. Shrink 901 opcodeprefix field. 902 i386-opc.tbl (Space0F, Space0F38, Space0F3A, SpaceXOP08, 903 SpaceXOP09, SpaceXOP0A): Define. Use them to replace 904 OpcodePrefix uses. 905 * i386-tbl.h: Re-generate. 906 907 2021-03-22 Martin Liska <mliska (a] suse.cz> 908 909 * aarch64-dis.c (parse_aarch64_dis_option): Replace usage of CONST_STRNEQ with startswith. 910 * arc-dis.c (parse_option): Likewise. 911 * arm-dis.c (parse_arm_disassembler_options): Likewise. 912 * cris-dis.c (print_with_operands): Likewise. 913 * h8300-dis.c (bfd_h8_disassemble): Likewise. 914 * i386-dis.c (print_insn): Likewise. 915 * ia64-gen.c (fetch_insn_class): Likewise. 916 (parse_resource_users): Likewise. 917 (in_iclass): Likewise. 918 (lookup_specifier): Likewise. 919 (insert_opcode_dependencies): Likewise. 920 * mips-dis.c (parse_mips_ase_option): Likewise. 921 (parse_mips_dis_option): Likewise. 922 * s390-dis.c (disassemble_init_s390): Likewise. 923 * wasm32-dis.c (parse_wasm32_disassembler_options): Likewise. 924 925 2021-03-16 Kuan-Lin Chen <kuanlinchentw (a] gmail.com> 926 927 * riscv-opc.c (riscv_opcodes): Add zba, zbb and zbc instructions. 928 929 2021-03-12 Przemyslaw Wirkus <przemyslaw.wirkus (a] arm.com> 930 931 * aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1, 932 icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers. 933 934 2021-03-12 Alan Modra <amodra (a] gmail.com> 935 936 * i386-dis.c (print_insn <PREFIX_IGNORED>): Correct typo. 937 938 2021-03-11 Jan Beulich <jbeulich (a] suse.com> 939 940 * i386-dis.c (OP_XMM): Re-order checks. 941 942 2021-03-11 Jan Beulich <jbeulich (a] suse.com> 943 944 * i386-dis.c (putop): Drop need_vex check when also checking 945 vex.evex. 946 (intel_operand_size, OP_E_memory): Drop vex.evex check when also 947 checking vex.b. 948 949 2021-03-11 Jan Beulich <jbeulich (a] suse.com> 950 951 * i386-dis.c (OP_E_memory): Drop xmmq_mode from broadcast 952 checks. Move case label past broadcast check. 953 954 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 955 956 * opcodes/i386-dis.c (MVexVSIBDQWpX, MVexVSIBQDWpX, 957 vex_vsib_d_w_d_mode, vex_vsib_q_w_d_mode, 958 REG_EVEX_0F38C7_M_0_L_2_W_0, REG_EVEX_0F38C7_M_0_L_2_W_1, 959 EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1, EVEX_W_0F38A3, 960 EVEX_W_0F38C7_M_0_L_2): Delete. 961 (REG_EVEX_0F38C7_M_0_L_2): New. 962 (intel_operand_size): Handle VEX and EVEX the same for 963 vex_vsib_d_w_dq_mode and vex_vsib_q_w_dq_mode. Drop 964 vex_vsib_d_w_d_mode and vex_vsib_q_w_d_mode cases. 965 (OP_E_memory, OP_XMM, OP_VEX): Drop vex_vsib_d_w_d_mode and 966 vex_vsib_q_w_d_mode uses. 967 * i386-dis-evex.h (evex_table): Adjust opcode 0F3891, 0F3893, 968 0F38A1, and 0F38A3 entries. 969 * i386-dis-evex-len.h (evex_len_table): Adjust opcode 0F38C7 970 entry. 971 * i386-dis-evex-reg.h: Fold opcode 0F38C7 entries. 972 * i386-dis-evex-w.h: Delete opcode 0F3891, 0F3893, 0F38A1, and 973 0F38A3 entries. 974 975 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 976 977 * opcodes/i386-dis.c (REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0, 978 REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0, 979 MOD_VEX_0FXOP_09_12): Rename to ... 980 (REG_XOP_09_01_L_0, REG_XOP_09_02_L_0, REG_XOP_09_12_M_1_L_0, 981 REG_XOP_0A_12_L_0, MOD_XOP_09_12): ... these. 982 (MOD_62_32BIT, MOD_8D, MOD_C4_32BIT, MOD_C5_32BIT, 983 RM_0F3A0F_P_1_MOD_3_REG_0, X86_64_0F24, X86_64_0F26, 984 X86_64_VEX_0F3849, X86_64_VEX_0F384B, X86_64_VEX_0F385C, 985 X86_64_VEX_0F385E, X86_64_0FC7_REG_6_MOD_3_PREFIX_1): Move. 986 (reg_table): Adjust comments. 987 (x86_64_table): Move X86_64_0F24, X86_64_0F26, 988 X86_64_VEX_0F3849, X86_64_VEX_0F384B, X86_64_VEX_0F385C, 989 X86_64_VEX_0F385E, and X86_64_0FC7_REG_6_MOD_3_PREFIX_1 entries. 990 (xop_table): Adjust opcode 09_01, 09_02, and 09_12 entries. 991 (vex_len_table): Adjust opcode 0A_12 entry. 992 (mod_table): Move MOD_62_32BIT, MOD_8D, MOD_C4_32BIT, 993 MOD_C5_32BIT, and MOD_XOP_09_12 entries. 994 (rm_table): Move hreset entry. 995 996 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 997 998 * opcodes/i386-dis.c (EVEX_LEN_0F6E, EVEX_LEN_0F7E_P_1, 999 EVEX_LEN_0F7E_P_2, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6, 1000 EVEX_LEN_0F3816, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15, 1001 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A20, 1002 EVEX_LEN_0F3A21_W_0, EVEX_LEN_0F3A22, EVEX_W_0FD6_L_0): Delete. 1003 (EVEX_LEN_0F3816, EVEX_W_0FD6): New. 1004 (get_valid_dis386): Also handle 512-bit vector length when 1005 vectoring into vex_len_table[]. 1006 * i386-dis-evex.h (evex_table): Adjust opcode 0F6E, 0FC4, 0FC5, 1007 0FD6, 0F3A14, 0F3A15, 0F3A16, 0F3A17, 0F3A20, and 0F3A22 1008 entries. 1009 * i386-dis-evex-len.h: Delete opcode 0F6E, 0FC4, 0FC5, 0FD6, 1010 0F3A14, 0F3A15, 0F3A16, 0F3A17, 0F3A20, and 0F3A22 entries. 1011 * i386-dis-evex-prefix.h: Adjust 0F7E entry. 1012 * i386-dis-evex-w.h: Adjust 0F7E, 0F7F, 0FD6, and 0F3A21 1013 entries. 1014 1015 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1016 1017 * opcodes/i386-dis.c (EVEX_LEN_0F3A00_W_1, EVEX_LEN_0F3A01_W_1): 1018 Rename to EVEX_LEN_0F3A00 and EVEX_LEN_0F3A01 respectively. 1019 EVEX_W_0F3A00, EVEX_W_0F3A01): Delete. 1020 * i386-dis-evex.h (evex_table): Adjust opcode 0F3A00 and 0F3A01 1021 entries. 1022 * i386-dis-evex-len.h (evex_len_table): Likewise. 1023 * i386-dis-evex-w.h: Remove opcode 0F3A00 and 0F3A01 entries. 1024 1025 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1026 1027 * opcodes/i386-dis.c (REG_EVEX_0F38C6, REG_EVEX_0F38C7, 1028 MOD_EVEX_0F381A_W_0, MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, 1029 MOD_EVEX_0F381B_W_1, MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, 1030 MOD_EVEX_0F385B_W_0, MOD_EVEX_0F385B_W_1, 1031 MOD_EVEX_0F38C6_REG_1, MOD_EVEX_0F38C6_REG_2, 1032 MOD_EVEX_0F38C6_REG_5, MOD_EVEX_0F38C6_REG_6, 1033 MOD_EVEX_0F38C7_REG_1, MOD_EVEX_0F38C7_REG_2, 1034 MOD_EVEX_0F38C7_REG_5, MOD_EVEX_0F38C7_REG_6 1035 EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1, 1036 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0, 1037 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0, 1038 EVEX_LEN_0F385A_W_0_M_0, EVEX_LEN_0F385A_W_1_M_0, 1039 EVEX_LEN_0F385B_W_0_M_0, EVEX_LEN_0F385B_W_1_M_0, 1040 EVEX_LEN_0F38C6_R_1_M_0, EVEX_LEN_0F38C6_R_2_M_0, 1041 EVEX_LEN_0F38C6_R_5_M_0, EVEX_LEN_0F38C6_R_6_M_0, 1042 EVEX_LEN_0F38C7_R_1_M_0_W_0, EVEX_LEN_0F38C7_R_1_M_0_W_1, 1043 EVEX_LEN_0F38C7_R_2_M_0_W_0, EVEX_LEN_0F38C7_R_2_M_0_W_1, 1044 EVEX_LEN_0F38C7_R_5_M_0_W_0, EVEX_LEN_0F38C7_R_5_M_0_W_1, 1045 EVEX_LEN_0F38C7_R_6_M_0_W_0, EVEX_LEN_0F38C7_R_6_M_0_W_1, 1046 EVEX_LEN_0F3A18_W_0, EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0, 1047 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0, EVEX_LEN_0F3A1A_W_1, 1048 EVEX_LEN_0F3A1B_W_0, EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A23_W_0, 1049 EVEX_LEN_0F3A23_W_1, EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1, 1050 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1, EVEX_LEN_0F3A3A_W_0, 1051 EVEX_LEN_0F3A3A_W_1, EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1, 1052 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1 EVEX_W_0F3819, 1053 EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F385A, EVEX_W_0F385B, 1054 EVEX_W_0F38C7_R_1_M_0, EVEX_W_0F38C7_R_2_M_0, 1055 EVEX_W_0F38C7_R_5_M_0, EVEX_W_0F38C7_R_6_M_0, 1056 EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A, EVEX_W_0F3A1B, 1057 EVEX_W_0F3A23, EVEX_W_0F3A38, EVEX_W_0F3A39, EVEX_W_0F3A3A, 1058 EVEX_W_0F3A3B, EVEX_W_0F3A43): Delete. 1059 REG_EVEX_0F38C6_M_0_L_2, REG_EVEX_0F38C7_M_0_L_2_W_0, 1060 REG_EVEX_0F38C7_M_0_L_2_W_1, MOD_EVEX_0F381A, 1061 MOD_EVEX_0F381B, MOD_EVEX_0F385A, MOD_EVEX_0F385B, 1062 MOD_EVEX_0F38C6, MOD_EVEX_0F38C7 EVEX_LEN_0F3819, 1063 EVEX_LEN_0F381A_M_0, EVEX_LEN_0F381B_M_0, 1064 EVEX_LEN_0F385A_M_0, EVEX_LEN_0F385B_M_0, 1065 EVEX_LEN_0F38C6_M_0, EVEX_LEN_0F38C7_M_0, 1066 EVEX_LEN_0F3A18, EVEX_LEN_0F3A19, EVEX_LEN_0F3A1A, 1067 EVEX_LEN_0F3A1B, EVEX_LEN_0F3A23, EVEX_LEN_0F3A38, 1068 EVEX_LEN_0F3A39, EVEX_LEN_0F3A3A, EVEX_LEN_0F3A3B, 1069 EVEX_LEN_0F3A43, EVEX_W_0F3819_L_n, EVEX_W_0F381A_M_0_L_n, 1070 EVEX_W_0F381B_M_0_L_2, EVEX_W_0F385A_M_0_L_n, 1071 EVEX_W_0F385B_M_0_L_2, EVEX_W_0F38C7_M_0_L_2, 1072 EVEX_W_0F3A18_L_n, EVEX_W_0F3A19_L_n, EVEX_W_0F3A1A_L_2, 1073 EVEX_W_0F3A1B_L_2, EVEX_W_0F3A23_L_n, EVEX_W_0F3A38_L_n, 1074 EVEX_W_0F3A39_L_n, EVEX_W_0F3A3A_L_2, EVEX_W_0F3A3B_L_2, 1075 EVEX_W_0F3A43_L_n): New. 1076 * i386-dis-evex.h (evex_table): Adjust opcode 0F3819, 0F381A, 1077 0F381B, 0F385A, 0F385B, 0F38C7, 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, 1078 0F3A23, 0F3A38, 0F3A39, 0F3A3A, 0F3A3B, and 0F3A43 entries. 1079 * i386-dis-evex-len.h (evex_len_table): Link to vex_w_table[] 1080 for opcodes 0F3819, 0F381A, 0F381B, 0F385A, 0F385B, 0F38C7, 1081 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, 0F3A23, 0F3A38, 0F3A39, 0F3A3A, 1082 0F3A3B, and 0F3A43. Link to reg_table[] for opcodes 0F38C6. 1083 * i386-dis-evex-mod.h: Adjust opcode 0F381A, 0F381B, 0F385A, 1084 0F385B, 0F38C6, and 0F38C7 entries. 1085 * i386-dis-evex-reg.h: No longer link to mod_table[] for opcodes 1086 0F38C6 and 0F38C7. 1087 * i386-dis-evex-w.h: No longer link to evex_len_table[] for 1088 opcodes 0F3819, 0F38C7, 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, 0F3A23, 1089 0F3A38, 0F3A39, 0F3A3A, 0F3A3B, and 0F3A43. No longer link to 1090 evex_len_table[] for opcodes 0F381A, 0F381B, 0F385A, and 0F385B. 1091 1092 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1093 1094 * opcodes/i386-dis.c (MOD_VEX_W_0_0F41_P_0_LEN_1, 1095 MOD_VEX_W_1_0F41_P_0_LEN_1, MOD_VEX_W_0_0F41_P_2_LEN_1, 1096 MOD_VEX_W_1_0F41_P_2_LEN_1, MOD_VEX_W_0_0F42_P_0_LEN_1, 1097 MOD_VEX_W_1_0F42_P_0_LEN_1, MOD_VEX_W_0_0F42_P_2_LEN_1, 1098 MOD_VEX_W_1_0F42_P_2_LEN_1, MOD_VEX_W_0_0F44_P_0_LEN_1, 1099 MOD_VEX_W_1_0F44_P_0_LEN_1, MOD_VEX_W_0_0F44_P_2_LEN_1, 1100 MOD_VEX_W_1_0F44_P_2_LEN_1, MOD_VEX_W_0_0F45_P_0_LEN_1, 1101 MOD_VEX_W_1_0F45_P_0_LEN_1, MOD_VEX_W_0_0F45_P_2_LEN_1, 1102 MOD_VEX_W_1_0F45_P_2_LEN_1, MOD_VEX_W_0_0F46_P_0_LEN_1, 1103 MOD_VEX_W_1_0F46_P_0_LEN_1, MOD_VEX_W_0_0F46_P_2_LEN_1, 1104 MOD_VEX_W_1_0F46_P_2_LEN_1, MOD_VEX_W_0_0F47_P_0_LEN_1, 1105 MOD_VEX_W_1_0F47_P_0_LEN_1, MOD_VEX_W_0_0F47_P_2_LEN_1, 1106 MOD_VEX_W_1_0F47_P_2_LEN_1, MOD_VEX_W_0_0F4A_P_0_LEN_1, 1107 MOD_VEX_W_1_0F4A_P_0_LEN_1, MOD_VEX_W_0_0F4A_P_2_LEN_1, 1108 MOD_VEX_W_1_0F4A_P_2_LEN_1, MOD_VEX_W_0_0F4B_P_0_LEN_1, 1109 MOD_VEX_W_1_0F4B_P_0_LEN_1, MOD_VEX_W_0_0F4B_P_2_LEN_1, 1110 MOD_VEX_W_0_0F91_P_0_LEN_0, MOD_VEX_W_1_0F91_P_0_LEN_0, 1111 MOD_VEX_W_0_0F91_P_2_LEN_0, MOD_VEX_W_1_0F91_P_2_LEN_0, 1112 MOD_VEX_W_0_0F92_P_0_LEN_0, MOD_VEX_W_0_0F92_P_2_LEN_0, 1113 MOD_VEX_0F92_P_3_LEN_0, MOD_VEX_W_0_0F93_P_0_LEN_0, 1114 MOD_VEX_W_0_0F93_P_2_LEN_0, MOD_VEX_0F93_P_3_LEN_0, 1115 MOD_VEX_W_0_0F98_P_0_LEN_0, MOD_VEX_W_1_0F98_P_0_LEN_0, 1116 MOD_VEX_W_0_0F98_P_2_LEN_0, MOD_VEX_W_1_0F98_P_2_LEN_0, 1117 MOD_VEX_W_0_0F99_P_0_LEN_0, MOD_VEX_W_1_0F99_P_0_LEN_0, 1118 MOD_VEX_W_0_0F99_P_2_LEN_0, MOD_VEX_W_1_0F99_P_2_LEN_0, 1119 PREFIX_VEX_0F41, PREFIX_VEX_0F42, PREFIX_VEX_0F44, 1120 PREFIX_VEX_0F45, PREFIX_VEX_0F46, PREFIX_VEX_0F47, 1121 PREFIX_VEX_0F4A, PREFIX_VEX_0F4B, PREFIX_VEX_0F90, 1122 PREFIX_VEX_0F91, PREFIX_VEX_0F92, PREFIX_VEX_0F93, 1123 PREFIX_VEX_0F98, PREFIX_VEX_0F99, VEX_LEN_0F41_P_0, 1124 VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_0, VEX_LEN_0F42_P_2, 1125 VEX_LEN_0F44_P_0, VEX_LEN_0F44_P_2, VEX_LEN_0F45_P_0, 1126 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_0, VEX_LEN_0F46_P_2, 1127 VEX_LEN_0F47_P_0, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0, 1128 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F4B_P_2, 1129 VEX_LEN_0F90_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_0, 1130 VEX_LEN_0F91_P_2, VEX_LEN_0F92_P_0, VEX_LEN_0F92_P_2, 1131 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_0, VEX_LEN_0F93_P_2, 1132 VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_0, VEX_LEN_0F98_P_2, 1133 VEX_LEN_0F99_P_0, VEX_LEN_0F99_P_2, VEX_W_0F41_P_0_LEN_1, 1134 VEX_W_0F41_P_2_LEN_1, VEX_W_0F42_P_0_LEN_1, 1135 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_0_LEN_0, 1136 VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_0_LEN_1, 1137 VEX_W_0F45_P_2_LEN_1, VEX_W_0F46_P_0_LEN_1, 1138 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_0_LEN_1, 1139 VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1, 1140 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, 1141 VEX_W_0F4B_P_2_LEN_1, VEX_W_0F90_P_0_LEN_0, 1142 VEX_W_0F90_P_2_LEN_0, VEX_W_0F91_P_0_LEN_0, 1143 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_0_LEN_0, 1144 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_0_LEN_0, 1145 VEX_W_0F93_P_2_LEN_0, VEX_W_0F98_P_0_LEN_0, 1146 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, 1147 VEX_W_0F99_P_2_LEN_0): Delete. 1148 MOD_VEX_0F41_L_1, MOD_VEX_0F42_L_1, MOD_VEX_0F44_L_0, 1149 MOD_VEX_0F45_L_1, MOD_VEX_0F46_L_1, MOD_VEX_0F47_L_1, 1150 MOD_VEX_0F4A_L_1, MOD_VEX_0F4B_L_1, MOD_VEX_0F91_L_0, 1151 MOD_VEX_0F92_L_0, MOD_VEX_0F93_L_0, MOD_VEX_0F98_L_0, 1152 MOD_VEX_0F99_L_0, PREFIX_VEX_0F41_L_1_M_1_W_0, 1153 PREFIX_VEX_0F41_L_1_M_1_W_1, PREFIX_VEX_0F42_L_1_M_1_W_0, 1154 PREFIX_VEX_0F42_L_1_M_1_W_1, PREFIX_VEX_0F44_L_0_M_1_W_0, 1155 PREFIX_VEX_0F44_L_0_M_1_W_1, PREFIX_VEX_0F45_L_1_M_1_W_0, 1156 PREFIX_VEX_0F45_L_1_M_1_W_1, PREFIX_VEX_0F46_L_1_M_1_W_0, 1157 PREFIX_VEX_0F46_L_1_M_1_W_1, PREFIX_VEX_0F47_L_1_M_1_W_0, 1158 PREFIX_VEX_0F47_L_1_M_1_W_1, PREFIX_VEX_0F4A_L_1_M_1_W_0, 1159 PREFIX_VEX_0F4A_L_1_M_1_W_1, PREFIX_VEX_0F4B_L_1_M_1_W_0, 1160 PREFIX_VEX_0F4B_L_1_M_1_W_1, PREFIX_VEX_0F90_L_0_W_0, 1161 PREFIX_VEX_0F90_L_0_W_1, PREFIX_VEX_0F91_L_0_M_0_W_0, 1162 PREFIX_VEX_0F91_L_0_M_0_W_1, PREFIX_VEX_0F92_L_0_M_1_W_0, 1163 PREFIX_VEX_0F92_L_0_M_1_W_1, PREFIX_VEX_0F93_L_0_M_1_W_0, 1164 PREFIX_VEX_0F93_L_0_M_1_W_1, PREFIX_VEX_0F98_L_0_M_1_W_0, 1165 PREFIX_VEX_0F98_L_0_M_1_W_1, PREFIX_VEX_0F99_L_0_M_1_W_0, 1166 PREFIX_VEX_0F99_L_0_M_1_W_1, VEX_LEN_0F41, VEX_LEN_0F42, 1167 VEX_LEN_0F44, VEX_LEN_0F45, VEX_LEN_0F46, VEX_LEN_0F47, 1168 VEX_LEN_0F4A, VEX_LEN_0F4B, VEX_LEN_0F90, VEX_LEN_0F91, 1169 VEX_LEN_0F92, VEX_LEN_0F93, VEX_LEN_0F98, VEX_LEN_0F99, 1170 VEX_W_0F41_L_1_M_1, VEX_W_0F42_L_1_M_1, VEX_W_0F44_L_0_M_1, 1171 VEX_W_0F45_L_1_M_1, VEX_W_0F46_L_1_M_1, VEX_W_0F47_L_1_M_1, 1172 VEX_W_0F4A_L_1_M_1, VEX_W_0F4B_L_1_M_1, VEX_W_0F90_L_0, 1173 VEX_W_0F91_L_0_M_0, VEX_W_0F92_L_0_M_1, VEX_W_0F93_L_0_M_1, 1174 VEX_W_0F98_L_0_M_1, VEX_W_0F99_L_0_M_1): New. 1175 (prefix_table): No longer link to vex_len_table[] for opcodes 1176 0F41, 0F42, 0F44, 0F45, 0F46, 0F47, 0F4A, 0F4B, 0F90, 0F91, 1177 0F92, 0F93, 0F98, and 0F99. 1178 (vex_table): Link to vex_len_table[] for opcodes 0F41, 0F42, 1179 0F44, 0F45, 0F46, 0F47, 0F4A, 0F4B, 0F90, 0F91, 0F92, 0F93, 1180 0F98, and 0F99. 1181 (vex_len_table): Link to mod_table[] for opcodes 0F41, 0F42, 1182 0F44, 0F45, 0F46, 0F47, 0F4A, 0F4B, 0F90, 0F91, 0F92, 0F93, 1183 0F98, and 0F99. 1184 (vex_w_table): Link to prefix_table[] for opcodes 0F41, 0F42, 1185 0F44, 0F45, 0F46, 0F47, 0F4A, 0F4B, 0F90, 0F91, 0F92, 0F93, 1186 0F98, and 0F99. 1187 (mod_table): Link to vex_w_table[] for opcodes 0F41, 0F42, 1188 0F44, 0F45, 0F46, 0F47, 0F4A, 0F4B, 0F90, 0F91, 0F92, 0F93, 1189 0F98, and 0F99. 1190 1191 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1192 1193 * opcodes/i386-dis.c (VEX_REG_0F71, VEX_REG_0F72, VEX_REG_0F73): 1194 Rename to REG_VEX_0F71_M_0, REG_VEX_0F72_M_0, and 1195 REG_VEX_0F73_M_0 respectively. 1196 (MOD_VEX_0F71_REG_2, MOD_VEX_0F71_REG_4, MOD_VEX_0F71_REG_6, 1197 MOD_VEX_0F72_REG_2, MOD_VEX_0F72_REG_4, MOD_VEX_0F72_REG_6, 1198 MOD_VEX_0F73_REG_2, MOD_VEX_0F73_REG_3, MOD_VEX_0F73_REG_6, 1199 MOD_VEX_0F73_REG_7): Delete. 1200 (MOD_VEX_0F71, MOD_VEX_0F72, MOD_VEX_0F73): New. 1201 (PREFIX_VEX_0F38F5, PREFIX_VEX_0F38F6, PREFIX_VEX_0F38F7, 1202 PREFIX_VEX_0F3AF0): Rename to PREFIX_VEX_0F38F5_L_0, 1203 PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, 1204 PREFIX_VEX_0F3AF0_L_0 respectively. 1205 (VEX_LEN_0F38F3_R_1, VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3, 1206 VEX_LEN_0F38F5_P_0, VEX_LEN_0F38F5_P_1, VEX_LEN_0F38F5_P_3, 1207 VEX_LEN_0F38F6_P_3, VEX_LEN_0F38F7_P_0, VEX_LEN_0F38F7_P_1, 1208 VEX_LEN_0F38F7_P_2, VEX_LEN_0F38F7_P_3): Delete. 1209 (VEX_LEN_0F38F3, VEX_LEN_0F38F5, VEX_LEN_0F38F6, 1210 VEX_LEN_0F38F7): New. 1211 (VEX_LEN_0F3AF0_P_3): Rename to VEX_LEN_0F3AF0. 1212 (reg_table): No longer link to mod_table[] for VEX opcodes 0F71, 1213 0F72, and 0F73. No longer link to vex_len_table[] for opcode 1214 0F38F3. 1215 (prefix_table): No longer link to vex_len_table[] for opcodes 1216 0F38F5, 0F38F6, 0F38F7, and 0F3AF0. 1217 (vex_table): Link to mod_table[] for opcodes 0F71, 0F72, and 1218 0F73. Link to vex_len_table[] for opcodes 0F38F3, 0F38F5, 1219 0F38F6, 0F38F7, and 0F3AF0. 1220 (vex_len_table): Link to reg_table[] for opcode 0F38F3. Link to 1221 prefix_table[] for opcodes 0F38F5, 0F38F6, 0F38F7, and 0F3AF0. 1222 (mod_table): Link to reg_table[] for VEX opcodes 0F71, 0F72, and 1223 0F73. 1224 1225 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1226 1227 * opcodes/i386-dis.c (REG_0F71, REG_0F72, REG_0F73): Rename to 1228 REG_0F71_MOD_0, REG_0F72_MOD_0, and REG_0F73_MOD_0 respectively. 1229 (MOD_0F71_REG_2, MOD_0F71_REG_4, MOD_0F71_REG_6, MOD_0F72_REG_2, 1230 MOD_0F72_REG_4, MOD_0F72_REG_6, MOD_0F73_REG_2, MOD_0F73_REG_3, 1231 MOD_0F73_REG_6, MOD_0F73_REG_7): Delete. 1232 (MOD_0F71, MOD_0F72, MOD_0F73): New. 1233 (dis386_twobyte): Link to mod_table[] for opcodes 71, 72, and 1234 73. 1235 (reg_table): No longer link to mod_table[] for opcodes 0F71, 1236 0F72, and 0F73. 1237 (mod_table): Link to reg_table[] for opcodes 0F71, 0F72, and 1238 0F73. 1239 1240 2021-03-10 Jan Beulich <jbeulich (a] suse.com> 1241 1242 * opcodes/i386-dis.c (MOD_0F18_REG_4, MOD_0F18_REG_5, 1243 MOD_0F18_REG_6, MOD_0F18_REG_7): Delete. 1244 (reg_table): Don't link to mod_table[] where not needed. Add 1245 PREFIX_IGNORED to nop entries. 1246 (prefix_table): Replace PREFIX_OPCODE in nop entries. 1247 (mod_table): Add nop entries next to prefetch ones. Drop 1248 MOD_0F18_REG_4, MOD_0F18_REG_5, MOD_0F18_REG_6, and 1249 MOD_0F18_REG_7 entries. Add PREFIX_IGNORED to nop entries. 1250 (rm_table): Add PREFIX_IGNORED to nop entries. Drop 1251 PREFIX_OPCODE from endbr* entries. 1252 (get_valid_dis386): Also consider entry's name when zapping 1253 vindex. 1254 (print_insn): Handle PREFIX_IGNORED. 1255 1256 2021-03-09 Jan Beulich <jbeulich (a] suse.com> 1257 1258 * opcodes/i386-gen.c (opcode_modifiers): Delete NoTrackPrefixOk, 1259 IsLockable, RepPrefixOk, and HLEPrefixOk elements. Add PrefixOk 1260 element. 1261 * opcodes/i386-opc.h (NoTrackPrefixOk, IsLockable, HLEPrefixNone, 1262 HLEPrefixLock, HLEPrefixAny, HLEPrefixRelease): Delete. 1263 (PrefixNone, PrefixRep, PrefixHLERelease, PrefixNoTrack, 1264 PrefixLock, PrefixHLELock, PrefixHLEAny): Define. 1265 (struct i386_opcode_modifier): Delete notrackprefixok, 1266 islockable, hleprefixok, and repprefixok fields. Add prefixok 1267 field. 1268 * opcodes/i386-opc.tbl (RepPrefixOk, LockPrefixOk, HLEPrefixAny, 1269 HLEPrefixLock, HLEPrefixRelease, NoTrackPrefixOk): Define. 1270 (mov, xchg, add, inc, sub, dec, sbb, and, or, xor, adc, neg, 1271 not, btc, btr, bts, xadd, cmpxchg, cmpxchg8b, movq, cmpxchg16b): 1272 Replace HLEPrefixOk. 1273 * opcodes/i386-tbl.h: Re-generate. 1274 1275 2021-03-09 Jan Beulich <jbeulich (a] suse.com> 1276 1277 * opcodes/i386-dis.c (dis386_twobyte): Add %LQ to sysexit. 1278 * opcodes/i386-opc.tbl (sysexit): Drop No_lSuf and No_qSuf from 1279 64-bit form. 1280 * opcodes/i386-tbl.h: Re-generate. 1281 1282 2021-03-03 Jan Beulich <jbeulich (a] suse.com> 1283 1284 * i386-gen.c (output_i386_opcode): Don't get operand count. Look 1285 for {} instead of {0}. Don't look for '0'. 1286 * i386-opc.tbl: Drop operand count field. Drop redundant operand 1287 size specifiers. 1288 1289 2021-02-19 Nelson Chu <nelson.chu (a] sifive.com> 1290 1291 PR 27158 1292 * riscv-dis.c (print_insn_args): Updated encoding macros. 1293 * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM. 1294 (match_c_addi16sp): Updated encoding macros. 1295 (match_c_lui): Likewise. 1296 (match_c_lui_with_hint): Likewise. 1297 (match_c_addi4spn): Likewise. 1298 (match_c_slli): Likewise. 1299 (match_slli_as_c_slli): Likewise. 1300 (match_c_slli64): Likewise. 1301 (match_srxi_as_c_srxi): Likewise. 1302 (riscv_insn_types): Added .insn css/cl/cs. 1303 1304 2021-02-18 Nelson Chu <nelson.chu (a] sifive.com> 1305 1306 * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h. 1307 (default_priv_spec): Updated type to riscv_spec_class. 1308 (parse_riscv_dis_option): Updated. 1309 * riscv-opc.c: Moved stuff and make the file tidy. 1310 1311 2021-02-17 Alan Modra <amodra (a] gmail.com> 1312 1313 * wasm32-dis.c: Include limits.h. 1314 (CHAR_BIT): Provide backup define. 1315 (wasm_read_leb128): Use CHAR_BIT to size "result" in bits. 1316 Correct signed overflow checking. 1317 1318 2021-02-16 Jan Beulich <jbeulich (a] suse.com> 1319 1320 * i386-opc.tbl: Split CVTPI2PD template. Add SSE2AVX variant. 1321 * i386-tbl.h: Re-generate. 1322 1323 2021-02-16 Jan Beulich <jbeulich (a] suse.com> 1324 1325 * i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor 1326 Oword. 1327 * i386-opc.tbl (CpuFP, Mmword, Oword): Define. 1328 1329 2021-02-15 Andreas Krebbel <krebbel (a] linux.ibm.com> 1330 1331 * s390-mkopc.c (main): Accept arch14 as cpu string. 1332 * s390-opc.txt: Add new arch14 instructions. 1333 1334 2021-02-04 Nick Alcock <nick.alcock (a] oracle.com> 1335 1336 * configure.ac (SHARED_LIBADD): Remove explicit -lintl population in 1337 favour of LIBINTL. 1338 * configure: Regenerated. 1339 1340 2021-02-08 Mike Frysinger <vapier (a] gentoo.org> 1341 1342 * tic54x-dis.c (sprint_mmr): Change to tic54x_mmregs. 1343 * tic54x-opc.c (regs): Rename to ... 1344 (tic54x_regs): ... this. 1345 (mmregs): Rename to ... 1346 (tic54x_mmregs): ... this. 1347 (condition_codes): Rename to ... 1348 (tic54x_condition_codes): ... this. 1349 (cc2_codes): Rename to ... 1350 (tic54x_cc2_codes): ... this. 1351 (cc3_codes): Rename to ... 1352 (tic54x_cc3_codes): ... this. 1353 (status_bits): Rename to ... 1354 (tic54x_status_bits): ... this. 1355 (misc_symbols): Rename to ... 1356 (tic54x_misc_symbols): ... this. 1357 1358 2021-02-04 Nelson Chu <nelson.chu (a] sifive.com> 1359 1360 * riscv-opc.c (MASK_RVB_IMM): Removed. 1361 (riscv_opcodes): Removed zb* instructions. 1362 (riscv_ext_version_table): Removed versions for zb*. 1363 1364 2021-01-26 Alan Modra <amodra (a] gmail.com> 1365 1366 * i386-gen.c (parse_template): Ensure entire template_instance 1367 is initialised. 1368 1369 2021-01-15 Nelson Chu <nelson.chu (a] sifive.com> 1370 1371 * riscv-opc.c (riscv_gpr_names_abi): Aligned the code. 1372 (riscv_fpr_names_abi): Likewise. 1373 (riscv_opcodes): Likewise. 1374 (riscv_insn_types): Likewise. 1375 1376 2021-01-15 Nelson Chu <nelson.chu (a] sifive.com> 1377 1378 * riscv-dis.c (parse_riscv_dis_option): Fix typos of message. 1379 1380 2021-01-15 Nelson Chu <nelson.chu (a] sifive.com> 1381 1382 * riscv-dis.c: Comments tidy and improvement. 1383 * riscv-opc.c: Likewise. 1384 1385 2021-01-13 Alan Modra <amodra (a] gmail.com> 1386 1387 * Makefile.in: Regenerate. 1388 1389 2021-01-12 H.J. Lu <hongjiu.lu (a] intel.com> 1390 1391 PR binutils/26792 1392 * configure.ac: Use GNU_MAKE_JOBSERVER. 1393 * aclocal.m4: Regenerated. 1394 * configure: Likewise. 1395 1396 2021-01-12 Nick Clifton <nickc (a] redhat.com> 1397 1398 * po/sr.po: Updated Serbian translation. 1399 1400 2021-01-11 H.J. Lu <hongjiu.lu (a] intel.com> 1401 1402 PR ld/27173 1403 * configure: Regenerated. 1404 1405 2021-01-11 Kyrylo Tkachov <kyrylo.tkachov (a] arm.com> 1406 1407 * aarch64-asm-2.c: Regenerate. 1408 * aarch64-dis-2.c: Likewise. 1409 * aarch64-opc-2.c: Likewise. 1410 * aarch64-opc.c (aarch64_print_operand): 1411 Delete handling of AARCH64_OPND_CSRE_CSR. 1412 * aarch64-tbl.h (aarch64_feature_csre): Delete. 1413 (CSRE): Likewise. 1414 (_CSRE_INSN): Likewise. 1415 (aarch64_opcode_table): Delete csr. 1416 1417 2021-01-11 Nick Clifton <nickc (a] redhat.com> 1418 1419 * po/de.po: Updated German translation. 1420 * po/fr.po: Updated French translation. 1421 * po/pt_BR.po: Updated Brazilian Portuguese translation. 1422 * po/sv.po: Updated Swedish translation. 1423 * po/uk.po: Updated Ukranian translation. 1424 1425 2021-01-09 H.J. Lu <hongjiu.lu (a] intel.com> 1426 1427 * configure: Regenerated. 1428 1429 2021-01-09 Nick Clifton <nickc (a] redhat.com> 1430 1431 * configure: Regenerate. 1432 * po/opcodes.pot: Regenerate. 1433 1434 2021-01-09 Nick Clifton <nickc (a] redhat.com> 1435 1436 * 2.36 release branch crated. 1437 1438 2021-01-08 Peter Bergner <bergner (a] linux.ibm.com> 1439 1440 * ppc-opc.c (insert_dw, (extract_dw): New functions. 1441 (DW, (XRC_MASK): Define. 1442 (powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics. 1443 1444 2021-01-09 Alan Modra <amodra (a] gmail.com> 1445 1446 * configure: Regenerate. 1447 1448 2021-01-08 Nick Clifton <nickc (a] redhat.com> 1449 1450 * po/sv.po: Updated Swedish translation. 1451 1452 2021-01-08 Nick Clifton <nickc (a] redhat.com> 1453 1454 PR 27129 1455 * aarch64-dis.c (determine_disassembling_preference): Move call to 1456 aarch64_match_operands_constraint outside of the assertion. 1457 * aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert. 1458 Replace with a return of FALSE. 1459 1460 PR 27139 1461 * aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a 1462 core system register. 1463 1464 2021-01-07 Samuel Thibault <samuel.thibault (a] gnu.org> 1465 1466 * configure: Regenerate. 1467 1468 2021-01-07 Nick Clifton <nickc (a] redhat.com> 1469 1470 * po/fr.po: Updated French translation. 1471 1472 2021-01-07 Fredrik Noring <noring (a] nocrew.org> 1473 1474 * m68k-opc.c (chkl): Change minimum architecture requirement to 1475 m68020. 1476 1477 2021-01-07 Philipp Tomsich <prt (a] gnu.org> 1478 1479 * riscv-opc.c (riscv_opcodes): Add pause hint instruction. 1480 1481 2021-01-07 Claire Xenia Wolf <claire (a] symbioticeda.com> 1482 Jim Wilson <jimw (a] sifive.com> 1483 Andrew Waterman <andrew (a] sifive.com> 1484 Maxim Blinov <maxim.blinov (a] embecosm.com> 1485 Kito Cheng <kito.cheng (a] sifive.com> 1486 Nelson Chu <nelson.chu (a] sifive.com> 1487 1488 * riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions. 1489 (MASK_RVB_IMM): Used for rev8 and orc.b encoding. 1490 1491 2021-01-01 Alan Modra <amodra (a] gmail.com> 1492 1493 Update year range in copyright notice of all files. 1494 1495 For older changes see ChangeLog-2020 1496 1498 Copyright (C) 2021-2026 Free Software Foundation, Inc. 1499 1500 Copying and distribution of this file, with or without modification, 1501 are permitted in any medium without royalty provided the copyright 1502 notice and this notice are preserved. 1503 1504 Local Variables: 1505 mode: change-log 1506 left-margin: 8 1507 fill-column: 74 1508 version-control: never 1509 End: 1510
Indexes created Sat May 30 00:24:47 UTC 2026