ChangeLog revision 1.1
1 2008-11-27 Alan Modra <amodra (a] bigpond.net.au> 2 3 * ppc-opc.c (extract_sprg): Correct operand range check. 4 5 2008-11-26 Andreas Schwab <schwab (a] suse.de> 6 7 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE) 8 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling. 9 (save_printer, save_print_address): Remove. 10 (fetch_data): Don't use them. 11 (match_insn_m68k): Always restore printing functions. 12 (print_insn_m68k): Don't save/restore printing functions. 13 14 2008-11-25 Nick Clifton <nickc (a] redhat.com> 15 16 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp. 17 18 2008-09-29 Nick Clifton <nickc (a] redhat.com> 19 20 * po/vi.po: Updated Vietnamese translation. 21 * po/fr.po: Updated French translation. 22 23 2008-09-09 Alan Modra <amodra (a] bigpond.net.au> 24 25 * Makefile.am: Run "make dep-am". 26 * Makefile.in: Regenerate. 27 * po/opcodes.pot: Regenerate. 28 29 2008-08-28 Jan Beulich <jbeulich (a] novell.com> 30 31 * i386-dis.c (dis386): Adjust far return mnemonics. 32 * i386-opc.tbl: Add retf. 33 * i386-tbl.h: Re-generate. 34 35 2008-08-28 Jan Beulich <jbeulich (a] novell.com> 36 37 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics. 38 39 2008-08-28 H.J. Lu <hongjiu.lu (a] intel.com> 40 41 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. 42 * ia64-gen.c (lookup_specifier): Likewise. 43 44 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. 45 * ia64-raw.tbl: Likewise. 46 * ia64-waw.tbl: Likewise. 47 * ia64-asmtab.c: Regenerated. 48 49 2008-08-27 H.J. Lu <hongjiu.lu (a] intel.com> 50 51 * i386-opc.tbl: Correct fidivr operand size. 52 53 * i386-tbl.h: Regenerated. 54 55 2008-08-24 Alan Modra <amodra (a] bigpond.net.au> 56 57 * configure.in: Update a number of obsolete autoconf macros. 58 * aclocal.m4: Regenerate. 59 60 2008-08-20 H.J. Lu <hongjiu.lu (a] intel.com> 61 62 AVX Programming Reference (August, 2008) 63 * i386-dis.c (PREFIX_VEX_38DB): New. 64 (PREFIX_VEX_38DC): Likewise. 65 (PREFIX_VEX_38DD): Likewise. 66 (PREFIX_VEX_38DE): Likewise. 67 (PREFIX_VEX_38DF): Likewise. 68 (PREFIX_VEX_3ADF): Likewise. 69 (VEX_LEN_38DB_P_2): Likewise. 70 (VEX_LEN_38DC_P_2): Likewise. 71 (VEX_LEN_38DD_P_2): Likewise. 72 (VEX_LEN_38DE_P_2): Likewise. 73 (VEX_LEN_38DF_P_2): Likewise. 74 (VEX_LEN_3ADF_P_2): Likewise. 75 (PREFIX_VEX_3A04): Updated. 76 (VEX_LEN_3A06_P_2): Likewise. 77 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC, 78 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF. 79 (x86_64_table): Likewise. 80 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2, 81 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and 82 VEX_LEN_3ADF_P_2. 83 84 * i386-opc.tbl: Add AES + AVX instructions. 85 * i386-init.h: Regenerated. 86 * i386-tbl.h: Likewise. 87 88 2008-08-15 Andreas Krebbel <Andreas.Krebbel (a] de.ibm.com> 89 90 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format. 91 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format. 92 93 2008-08-15 Alan Modra <amodra (a] bigpond.net.au> 94 95 PR 6526 96 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS. 97 * Makefile.in: Regenerate. 98 * aclocal.m4: Regenerate. 99 * config.in: Regenerate. 100 * configure: Regenerate. 101 102 2008-08-14 Sebastian Huber <sebastian.huber (a] embedded-brains.de> 103 104 PR 6825 105 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300. 106 107 2008-08-12 H.J. Lu <hongjiu.lu (a] intel.com> 108 109 * i386-opc.tbl: Add syscall and sysret for Cpu64. 110 111 * i386-tbl.h: Regenerated. 112 113 2008-08-04 Alan Modra <amodra (a] bigpond.net.au> 114 115 * Makefile.am (POTFILES.in): Set LC_ALL=C. 116 * Makefile.in: Regenerate. 117 * po/POTFILES.in: Regenerate. 118 119 2008-08-01 Peter Bergner <bergner (a] vnet.ibm.com> 120 121 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. 122 (print_insn_powerpc): Prepend 'vs' when printing VSX registers. 123 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. 124 * ppc-opc.c (insert_xt6): New static function. 125 (extract_xt6): Likewise. 126 (insert_xa6): Likewise. 127 (extract_xa6: Likewise. 128 (insert_xb6): Likewise. 129 (extract_xb6): Likewise. 130 (insert_xb6s): Likewise. 131 (extract_xb6s): Likewise. 132 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, 133 XX3DM_MASK, PPCVSX): New. 134 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", 135 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp". 136 137 2008-08-01 Pedro Alves <pedro (a] codesourcery.com> 138 139 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation. 140 * Makefile.in: Regenerate. 141 142 2008-08-01 H.J. Lu <hongjiu.lu (a] intel.com> 143 144 * i386-reg.tbl: Use Dw2Inval on AVX registers. 145 * i386-tbl.h: Regenerated. 146 147 2008-07-30 Michael J. Eager <eager (a] eagercon.com> 148 149 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. 150 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. 151 (insert_sprg, PPC405): Use PPC_OPCODE_405. 152 (powerpc_opcodes): Add Xilinx APU related opcodes. 153 154 2008-07-30 Alan Modra <amodra (a] bigpond.net.au> 155 156 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings. 157 158 2008-07-10 Richard Sandiford <rdsandiford (a] googlemail.com> 159 160 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16. 161 162 2008-07-07 Adam Nemet <anemet (a] caviumnetworks.com> 163 164 * mips-opc.c (CP): New macro. 165 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the 166 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and 167 dmtc2 Octeon instructions. 168 169 2008-07-07 Stan Shebs <stan (a] codesourcery.com> 170 171 * dis-init.c (init_disassemble_info): Init endian_code field. 172 * arm-dis.c (print_insn): Disassemble code according to 173 setting of endian_code. 174 (print_insn_big_arm): Detect when BE8 extension flag has been set. 175 176 2008-06-30 Richard Sandiford <rdsandiford (a] googlemail.com> 177 178 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check 179 for ELF symbols. 180 181 2008-06-25 Peter Bergner <bergner (a] vnet.ibm.com> 182 183 * ppc-dis.c (powerpc_init_dialect): Handle -M464. 184 (print_ppc_disassembler_options): Likewise. 185 * ppc-opc.c (PPC464): Define. 186 (powerpc_opcodes): Add mfdcrux and mtdcrux. 187 188 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues (a] gmx.de> 189 190 * configure: Regenerate. 191 192 2008-06-13 Peter Bergner <bergner (a] vnet.ibm.com> 193 194 * ppc-dis.c (print_insn_powerpc): Update prototye to use new 195 ppc_cpu_t typedef. 196 (struct dis_private): New. 197 (POWERPC_DIALECT): New define. 198 (powerpc_dialect): Renamed to... 199 (powerpc_init_dialect): This. Update to use ppc_cpu_t and 200 struct dis_private. 201 (print_insn_big_powerpc): Update for using structure in 202 info->private_data. 203 (print_insn_little_powerpc): Likewise. 204 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. 205 (skip_optional_operands): Likewise. 206 (print_insn_powerpc): Likewise. Remove initialization of dialect. 207 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, 208 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, 209 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, 210 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, 211 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, 212 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, 213 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect 214 param to be of type ppc_cpu_t. Update prototype. 215 216 2008-06-12 Adam Nemet <anemet (a] caviumnetworks.com> 217 218 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, 219 +s, +S. 220 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions 221 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, 222 syncw, syncws, vm3mulu, vm0 and vmulu. 223 224 * mips-dis.c (print_insn_args): Handle field descriptor +Q. 225 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, 226 seqi, sne and snei. 227 228 2008-05-30 H.J. Lu <hongjiu.lu (a] intel.com> 229 230 * i386-opc.tbl: Add vmovd with 64bit operand. 231 * i386-tbl.h: Regenerated. 232 233 2008-05-27 Martin Schwidefsky <schwidefsky (a] de.ibm.com> 234 235 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. 236 237 2008-05-22 H.J. Lu <hongjiu.lu (a] intel.com> 238 239 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. 240 * i386-tbl.h: Regenerated. 241 242 2008-05-22 H.J. Lu <hongjiu.lu (a] intel.com> 243 244 PR gas/6517 245 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss 246 into 32bit and 64bit. Remove Reg64|Qword and add 247 IgnoreSize|No_qSuf on 32bit version. 248 * i386-tbl.h: Regenerated. 249 250 2008-05-21 H.J. Lu <hongjiu.lu (a] intel.com> 251 252 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. 253 * i386-tbl.h: Regenerated. 254 255 2008-05-21 M R Swami Reddy <MR.Swami.Reddy (a] nsc.com> 256 257 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond. 258 259 2008-05-14 Alan Modra <amodra (a] bigpond.net.au> 260 261 * Makefile.am: Run "make dep-am". 262 * Makefile.in: Regenerate. 263 264 2008-05-02 H.J. Lu <hongjiu.lu (a] intel.com> 265 266 * i386-dis.c (MOVBE_Fixup): New. 267 (Mo): Likewise. 268 (PREFIX_0F3880): Likewise. 269 (PREFIX_0F3881): Likewise. 270 (PREFIX_0F38F0): Updated. 271 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update 272 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. 273 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. 274 275 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and 276 CPU_EPT_FLAGS. 277 (cpu_flags): Add CpuMovbe and CpuEPT. 278 279 * i386-opc.h (CpuMovbe): New. 280 (CpuEPT): Likewise. 281 (CpuLM): Updated. 282 (i386_cpu_flags): Add cpumovbe and cpuept. 283 284 * i386-opc.tbl: Add entries for movbe and EPT instructions. 285 * i386-init.h: Regenerated. 286 * i386-tbl.h: Likewise. 287 288 2008-04-29 Adam Nemet <anemet (a] caviumnetworks.com> 289 290 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for 291 the two drem and the two dremu macros. 292 293 2008-04-28 Adam Nemet <anemet (a] caviumnetworks.com> 294 295 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 296 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and 297 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros 298 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D. 299 300 2008-04-25 David S. Miller <davem (a] davemloft.net> 301 302 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr 303 instead of %sys_tick_cmpr, as suggested in architecture manuals. 304 305 2008-04-23 Paolo Bonzini <bonzini (a] gnu.org> 306 307 * aclocal.m4: Regenerate. 308 * configure: Regenerate. 309 310 2008-04-23 David S. Miller <davem (a] davemloft.net> 311 312 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara 313 extended values. 314 (prefetch_table): Add missing values. 315 316 2008-04-22 H.J. Lu <hongjiu.lu (a] intel.com> 317 318 * i386-gen.c (opcode_modifiers): Add NoAVX. 319 320 * i386-opc.h (NoAVX): New. 321 (OldGcc): Updated. 322 (i386_opcode_modifier): Add noavx. 323 324 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 325 instructions which don't have AVX equivalent. 326 * i386-tbl.h: Regenerated. 327 328 2008-04-18 H.J. Lu <hongjiu.lu (a] intel.com> 329 330 * i386-dis.c (OP_VEX_FMA): New. 331 (OP_EX_VexImmW): Likewise. 332 (VexFMA): Likewise. 333 (Vex128FMA): Likewise. 334 (EXVexImmW): Likewise. 335 (get_vex_imm8): Likewise. 336 (OP_EX_VexReg): Likewise. 337 (vex_i4_done): Renamed to ... 338 (vex_w_done): This. 339 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps 340 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on 341 FMA instructions. 342 (print_insn): Updated. 343 (OP_EX_VexW): Rewrite to swap register in VEX with EX. 344 (OP_REG_VexI4): Check invalid high registers. 345 346 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal (a] amd.com> 347 Michael Meissner <michael.meissner (a] amd.com> 348 349 * i386-opc.tbl: Fix protX to allow memory in the middle operand. 350 * i386-tbl.h: Regenerate from i386-opc.tbl. 351 352 2008-04-14 Edmar Wienskoski <edmar (a] freescale.com> 353 354 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to 355 accept Power E500MC instructions. 356 (print_ppc_disassembler_options): Document -Me500mc. 357 * ppc-opc.c (DUIS, DUI, T): New. 358 (XRT, XRTRA): Likewise. 359 (E500MC): Likewise. 360 (powerpc_opcodes): Add new Power E500MC instructions. 361 362 2008-04-10 Andreas Krebbel <krebbel1 (a] de.ibm.com> 363 364 * s390-dis.c (init_disasm): Evaluate disassembler_options. 365 (print_s390_disassembler_options): New function. 366 * disassemble.c (disassembler_usage): Invoke 367 print_s390_disassembler_options. 368 369 2008-04-10 Andreas Krebbel <krebbel1 (a] de.ibm.com> 370 371 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes 372 of local variables used for mnemonic parsing: prefix, suffix and 373 number. 374 375 2008-04-10 Andreas Krebbel <krebbel1 (a] de.ibm.com> 376 377 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic 378 extensions for conditional jumps (o, p, m, nz, z, nm, np, no). 379 (s390_crb_extensions): New extensions table. 380 (insertExpandedMnemonic): Handle '$' tag. 381 * s390-opc.txt: Remove conditional jump variants which can now 382 be expanded automatically. 383 Replace '*' tag with '$' in the compare and branch instructions. 384 385 2008-04-07 H.J. Lu <hongjiu.lu (a] intel.com> 386 387 * i386-dis.c (PREFIX_VEX_38XX): Add a tab. 388 (PREFIX_VEX_3AXX): Likewis. 389 390 2008-04-07 H.J. Lu <hongjiu.lu (a] intel.com> 391 392 * i386-opc.tbl: Remove 4 extra blank lines. 393 394 2008-04-04 H.J. Lu <hongjiu.lu (a] intel.com> 395 396 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL 397 with CPU_PCLMUL_FLAGS/CpuPCLMUL. 398 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. 399 * i386-opc.tbl: Likewise. 400 401 * i386-opc.h (CpuCLMUL): Renamed to ... 402 (CpuPCLMUL): This. 403 (CpuFMA): Updated. 404 (i386_cpu_flags): Replace cpuclmul with cpupclmul. 405 406 * i386-init.h: Regenerated. 407 408 2008-04-03 H.J. Lu <hongjiu.lu (a] intel.com> 409 410 * i386-dis.c (OP_E_register): New. 411 (OP_E_memory): Likewise. 412 (OP_VEX): Likewise. 413 (OP_EX_Vex): Likewise. 414 (OP_EX_VexW): Likewise. 415 (OP_XMM_Vex): Likewise. 416 (OP_XMM_VexW): Likewise. 417 (OP_REG_VexI4): Likewise. 418 (PCLMUL_Fixup): Likewise. 419 (VEXI4_Fixup): Likewise. 420 (VZERO_Fixup): Likewise. 421 (VCMP_Fixup): Likewise. 422 (VPERMIL2_Fixup): Likewise. 423 (rex_original): Likewise. 424 (rex_ignored): Likewise. 425 (Mxmm): Likewise. 426 (XMM): Likewise. 427 (EXxmm): Likewise. 428 (EXxmmq): Likewise. 429 (EXymmq): Likewise. 430 (Vex): Likewise. 431 (Vex128): Likewise. 432 (Vex256): Likewise. 433 (VexI4): Likewise. 434 (EXdVex): Likewise. 435 (EXqVex): Likewise. 436 (EXVexW): Likewise. 437 (EXdVexW): Likewise. 438 (EXqVexW): Likewise. 439 (XMVex): Likewise. 440 (XMVexW): Likewise. 441 (XMVexI4): Likewise. 442 (PCLMUL): Likewise. 443 (VZERO): Likewise. 444 (VCMP): Likewise. 445 (VPERMIL2): Likewise. 446 (xmm_mode): Likewise. 447 (xmmq_mode): Likewise. 448 (ymmq_mode): Likewise. 449 (vex_mode): Likewise. 450 (vex128_mode): Likewise. 451 (vex256_mode): Likewise. 452 (USE_VEX_C4_TABLE): Likewise. 453 (USE_VEX_C5_TABLE): Likewise. 454 (USE_VEX_LEN_TABLE): Likewise. 455 (VEX_C4_TABLE): Likewise. 456 (VEX_C5_TABLE): Likewise. 457 (VEX_LEN_TABLE): Likewise. 458 (REG_VEX_XX): Likewise. 459 (MOD_VEX_XXX): Likewise. 460 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. 461 (PREFIX_0F3A44): Likewise. 462 (PREFIX_0F3ADF): Likewise. 463 (PREFIX_VEX_XXX): Likewise. 464 (VEX_OF): Likewise. 465 (VEX_OF38): Likewise. 466 (VEX_OF3A): Likewise. 467 (VEX_LEN_XXX): Likewise. 468 (vex): Likewise. 469 (need_vex): Likewise. 470 (need_vex_reg): Likewise. 471 (vex_i4_done): Likewise. 472 (vex_table): Likewise. 473 (vex_len_table): Likewise. 474 (OP_REG_VexI4): Likewise. 475 (vex_cmp_op): Likewise. 476 (pclmul_op): Likewise. 477 (vpermil2_op): Likewise. 478 (m_mode): Updated. 479 (es_reg): Likewise. 480 (PREFIX_0F38F0): Likewise. 481 (PREFIX_0F3A60): Likewise. 482 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. 483 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF 484 and PREFIX_VEX_XXX entries. 485 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. 486 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and 487 PREFIX_0F3ADF. 488 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. 489 Add MOD_VEX_XXX entries. 490 (ckprefix): Initialize rex_original and rex_ignored. Store the 491 REX byte in rex_original. 492 (get_valid_dis386): Handle the implicit prefix in VEX prefix 493 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. 494 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before 495 calling get_valid_dis386. Use rex_original and rex_ignored when 496 printing out REX. 497 (putop): Handle "XY". 498 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and 499 ymmq_mode. 500 (OP_E_extended): Updated to use OP_E_register and 501 OP_E_memory. 502 (OP_XMM): Handle VEX. 503 (OP_EX): Likewise. 504 (XMM_Fixup): Likewise. 505 (CMP_Fixup): Use ARRAY_SIZE. 506 507 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, 508 CPU_FMA_FLAGS and CPU_AVX_FLAGS. 509 (operand_type_init): Add OPERAND_TYPE_REGYMM and 510 OPERAND_TYPE_VEX_IMM4. 511 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. 512 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, 513 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, 514 VexImmExt and SSE2AVX. 515 (operand_types): Add RegYMM, Ymmword and Vex_Imm4. 516 517 * i386-opc.h (CpuAVX): New. 518 (CpuAES): Likewise. 519 (CpuCLMUL): Likewise. 520 (CpuFMA): Likewise. 521 (Vex): Likewise. 522 (Vex256): Likewise. 523 (VexNDS): Likewise. 524 (VexNDD): Likewise. 525 (VexW0): Likewise. 526 (VexW1): Likewise. 527 (Vex0F): Likewise. 528 (Vex0F38): Likewise. 529 (Vex0F3A): Likewise. 530 (Vex3Sources): Likewise. 531 (VexImmExt): Likewise. 532 (SSE2AVX): Likewise. 533 (RegYMM): Likewise. 534 (Ymmword): Likewise. 535 (Vex_Imm4): Likewise. 536 (Implicit1stXmm0): Likewise. 537 (CpuXsave): Updated. 538 (CpuLM): Likewise. 539 (ByteOkIntel): Likewise. 540 (OldGcc): Likewise. 541 (Control): Likewise. 542 (Unspecified): Likewise. 543 (OTMax): Likewise. 544 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. 545 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, 546 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, 547 vex3sources, veximmext and sse2avx. 548 (i386_operand_type): Add regymm, ymmword and vex_imm4. 549 550 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. 551 552 * i386-reg.tbl: Add AVX registers, ymm0..ymm15. 553 554 * i386-init.h: Regenerated. 555 * i386-tbl.h: Likewise. 556 557 2008-03-26 Bernd Schmidt <bernd.schmidt (a] analog.com> 558 559 From Robin Getz <robin.getz (a] analog.com> 560 * bfin-dis.c (bu32): Typedef. 561 (enum const_forms_t): Add c_uimm32 and c_huimm32. 562 (constant_formats[]): Add uimm32 and huimm16. 563 (fmtconst_val): New. 564 (uimm32): Define. 565 (huimm32): Define. 566 (imm16_val): Define. 567 (luimm16_val): Define. 568 (struct saved_state): Define. 569 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, 570 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, 571 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. 572 (get_allreg): New. 573 (decode_LDIMMhalf_0): Print out the whole register value. 574 575 From Jie Zhang <jie.zhang (a] analog.com> 576 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for 577 multiply and multiply-accumulate to data register instruction. 578 579 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, 580 c_imm32, c_huimm32e): Define. 581 (constant_formats): Add flags for printing decimal, leading spaces, and 582 exact symbols. 583 (comment, parallel): Add global flags in all disassembly. 584 (fmtconst): Take advantage of new flags, and print default in hex. 585 (fmtconst_val): Likewise. 586 (decode_macfunc): Be consistant with spaces, tabs, comments, 587 capitalization in disassembly, fix minor coding style issues. 588 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. 589 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, 590 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, 591 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, 592 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, 593 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, 594 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, 595 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, 596 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, 597 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, 598 _print_insn_bfin, print_insn_bfin): Likewise. 599 600 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues (a] gmx.de> 601 602 * aclocal.m4: Regenerate. 603 * configure: Likewise. 604 * Makefile.in: Likewise. 605 606 2008-03-13 Alan Modra <amodra (a] bigpond.net.au> 607 608 * Makefile.am: Run "make dep-am". 609 * Makefile.in: Regenerate. 610 * configure: Regenerate. 611 612 2008-03-07 Alan Modra <amodra (a] bigpond.net.au> 613 614 * ppc-opc.c (powerpc_opcodes): Order and format. 615 616 2008-03-01 H.J. Lu <hongjiu.lu (a] intel.com> 617 618 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. 619 * i386-tbl.h: Regenerated. 620 621 2008-02-23 H.J. Lu <hongjiu.lu (a] intel.com> 622 623 * i386-opc.tbl: Disallow 16-bit near indirect branches for 624 x86-64. 625 * i386-tbl.h: Regenerated. 626 627 2008-02-21 Jan Beulich <jbeulich (a] novell.com> 628 629 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword 630 and Fword for far indirect jmp. Allow Reg16 and Word for near 631 indirect jmp on x86-64. Disallow Fword for lcall. 632 * i386-tbl.h: Re-generate. 633 634 2008-02-18 M R Swami Reddy <MR.Swami.Reddy (a] nsc.com> 635 636 * cr16-opc.c (cr16_num_optab): Defined 637 638 2008-02-16 H.J. Lu <hongjiu.lu (a] intel.com> 639 640 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. 641 * i386-init.h: Regenerated. 642 643 2008-02-14 Nick Clifton <nickc (a] redhat.com> 644 645 PR binutils/5524 646 * configure.in (SHARED_LIBADD): Select the correct host specific 647 file extension for shared libraries. 648 * configure: Regenerate. 649 650 2008-02-13 Jan Beulich <jbeulich (a] novell.com> 651 652 * i386-opc.h (RegFlat): New. 653 * i386-reg.tbl (flat): Add. 654 * i386-tbl.h: Re-generate. 655 656 2008-02-13 Jan Beulich <jbeulich (a] novell.com> 657 658 * i386-dis.c (a_mode): New. 659 (cond_jump_mode): Adjust. 660 (Ma): Change to a_mode. 661 (intel_operand_size): Handle a_mode. 662 * i386-opc.tbl: Allow Dword and Qword for bound. 663 * i386-tbl.h: Re-generate. 664 665 2008-02-13 Jan Beulich <jbeulich (a] novell.com> 666 667 * i386-gen.c (process_i386_registers): Process new fields. 668 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to 669 unsigned char. Add dw2_regnum and Dw2Inval. 670 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo 671 register names. 672 * i386-tbl.h: Re-generate. 673 674 2008-02-11 H.J. Lu <hongjiu.lu (a] intel.com> 675 676 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. 677 * i386-init.h: Updated. 678 679 2008-02-11 H.J. Lu <hongjiu.lu (a] intel.com> 680 681 * i386-gen.c (cpu_flags): Add CpuXsave. 682 683 * i386-opc.h (CpuXsave): New. 684 (CpuLM): Updated. 685 (i386_cpu_flags): Add cpuxsave. 686 687 * i386-dis.c (MOD_0FAE_REG_4): New. 688 (RM_0F01_REG_2): Likewise. 689 (MOD_0FAE_REG_5): Updated. 690 (RM_0F01_REG_3): Likewise. 691 (reg_table): Use MOD_0FAE_REG_4. 692 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated 693 for xrstor. 694 (rm_table): Add RM_0F01_REG_2. 695 696 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. 697 * i386-init.h: Regenerated. 698 * i386-tbl.h: Likewise. 699 700 2008-02-11 Jan Beulich <jbeulich (a] novell.com> 701 702 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove 703 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). 704 * i386-tbl.h: Re-generate. 705 706 2008-02-04 H.J. Lu <hongjiu.lu (a] intel.com> 707 708 PR 5715 709 * configure: Regenerated. 710 711 2008-02-04 Adam Nemet <anemet (a] caviumnetworks.com> 712 713 * mips-dis.c: Update copyright. 714 (mips_arch_choices): Add Octeon. 715 * mips-opc.c: Update copyright. 716 (IOCT): New macro. 717 (mips_builtin_opcodes): Add Octeon instruction synciobdma. 718 719 2008-01-29 Alan Modra <amodra (a] bigpond.net.au> 720 721 * ppc-opc.c: Support optional L form mtmsr. 722 723 2008-01-24 H.J. Lu <hongjiu.lu (a] intel.com> 724 725 * i386-dis.c (OP_E_extended): Handle r12 like rsp. 726 727 2008-01-23 H.J. Lu <hongjiu.lu (a] intel.com> 728 729 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. 730 * i386-init.h: Regenerated. 731 732 2008-01-23 Tristan Gingold <gingold (a] adacore.com> 733 734 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, 735 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr. 736 737 2008-01-22 H.J. Lu <hongjiu.lu (a] intel.com> 738 739 * i386-gen.c (cpu_flag_init): Remove CpuMMX2. 740 (cpu_flags): Likewise. 741 742 * i386-opc.h (CpuMMX2): Removed. 743 (CpuSSE): Updated. 744 745 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. 746 * i386-init.h: Regenerated. 747 * i386-tbl.h: Likewise. 748 749 2008-01-22 H.J. Lu <hongjiu.lu (a] intel.com> 750 751 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and 752 CPU_SMX_FLAGS. 753 * i386-init.h: Regenerated. 754 755 2008-01-15 H.J. Lu <hongjiu.lu (a] intel.com> 756 757 * i386-opc.tbl: Use Qword on movddup. 758 * i386-tbl.h: Regenerated. 759 760 2008-01-15 H.J. Lu <hongjiu.lu (a] intel.com> 761 762 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. 763 * i386-tbl.h: Regenerated. 764 765 2008-01-15 H.J. Lu <hongjiu.lu (a] intel.com> 766 767 * i386-dis.c (Mx): New. 768 (PREFIX_0FC3): Likewise. 769 (PREFIX_0FC7_REG_6): Updated. 770 (dis386_twobyte): Use PREFIX_0FC3. 771 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. 772 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on 773 movntss. 774 775 2008-01-14 H.J. Lu <hongjiu.lu (a] intel.com> 776 777 * i386-gen.c (opcode_modifiers): Add IntelSyntax. 778 (operand_types): Add Mem. 779 780 * i386-opc.h (IntelSyntax): New. 781 * i386-opc.h (Mem): New. 782 (Byte): Updated. 783 (Opcode_Modifier_Max): Updated. 784 (i386_opcode_modifier): Add intelsyntax. 785 (i386_operand_type): Add mem. 786 787 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more 788 instructions. 789 790 * i386-reg.tbl: Add size for accumulator. 791 792 * i386-init.h: Regenerated. 793 * i386-tbl.h: Likewise. 794 795 2008-01-13 H.J. Lu <hongjiu.lu (a] intel.com> 796 797 * i386-opc.h (Byte): Fix a typo. 798 799 2008-01-12 H.J. Lu <hongjiu.lu (a] intel.com> 800 801 PR gas/5534 802 * i386-gen.c (operand_type_init): Add Dword to 803 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. 804 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, 805 Qword and Xmmword. 806 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, 807 Xmmword, Unspecified and Anysize. 808 (set_bitfield): Make Mmword an alias of Qword. Make Oword 809 an alias of Xmmword. 810 811 * i386-opc.h (CheckSize): Removed. 812 (Byte): Updated. 813 (Word): Likewise. 814 (Dword): Likewise. 815 (Qword): Likewise. 816 (Xmmword): Likewise. 817 (FWait): Updated. 818 (OTMax): Likewise. 819 (i386_opcode_modifier): Remove checksize, byte, word, dword, 820 qword and xmmword. 821 (Fword): New. 822 (TBYTE): Likewise. 823 (Unspecified): Likewise. 824 (Anysize): Likewise. 825 (i386_operand_type): Add byte, word, dword, fword, qword, 826 tbyte xmmword, unspecified and anysize. 827 828 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, 829 Tbyte, Xmmword, Unspecified and Anysize. 830 831 * i386-reg.tbl: Add size for accumulator. 832 833 * i386-init.h: Regenerated. 834 * i386-tbl.h: Likewise. 835 836 2008-01-10 H.J. Lu <hongjiu.lu (a] intel.com> 837 838 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. 839 (REG_0F18): Updated. 840 (reg_table): Updated. 841 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. 842 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e. 843 844 2008-01-08 H.J. Lu <hongjiu.lu (a] intel.com> 845 846 * i386-gen.c (set_bitfield): Use fail () on error. 847 848 2008-01-08 H.J. Lu <hongjiu.lu (a] intel.com> 849 850 * i386-gen.c (lineno): New. 851 (filename): Likewise. 852 (set_bitfield): Report filename and line numer on error. 853 (process_i386_opcodes): Set filename and update lineno. 854 (process_i386_registers): Likewise. 855 856 2008-01-05 H.J. Lu <hongjiu.lu (a] intel.com> 857 858 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to 859 ATTSyntax. 860 861 * i386-opc.h (IntelMnemonic): Renamed to .. 862 (ATTSyntax): This 863 (Opcode_Modifier_Max): Updated. 864 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax 865 and intelsyntax. 866 867 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 868 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. 869 * i386-tbl.h: Regenerated. 870 871 2008-01-04 H.J. Lu <hongjiu.lu (a] intel.com> 872 873 * i386-gen.c: Update copyright to 2008. 874 * i386-opc.h: Likewise. 875 * i386-opc.tbl: Likewise. 876 877 * i386-init.h: Regenerated. 878 * i386-tbl.h: Likewise. 879 880 2008-01-04 H.J. Lu <hongjiu.lu (a] intel.com> 881 882 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, 883 pextrb, pextrw, pinsrb, pinsrw and pmovmskb. 884 * i386-tbl.h: Regenerated. 885 886 2008-01-03 H.J. Lu <hongjiu.lu (a] intel.com> 887 888 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and 889 CpuSSE4_2_Or_ABM. 890 (cpu_flags): Likewise. 891 892 * i386-opc.h (CpuSSE4_1_Or_5): Removed. 893 (CpuSSE4_2_Or_ABM): Likewise. 894 (CpuLM): Updated. 895 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. 896 897 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and 898 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 899 and CpuPadLock, respectively. 900 * i386-init.h: Regenerated. 901 * i386-tbl.h: Likewise. 902 903 2008-01-03 H.J. Lu <hongjiu.lu (a] intel.com> 904 905 * i386-gen.c (opcode_modifiers): Remove No_xSuf. 906 907 * i386-opc.h (No_xSuf): Removed. 908 (CheckSize): Updated. 909 910 * i386-tbl.h: Regenerated. 911 912 2008-01-02 H.J. Lu <hongjiu.lu (a] intel.com> 913 914 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to 915 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and 916 CPU_SSE5_FLAGS. 917 (cpu_flags): Add CpuSSE4_2_Or_ABM. 918 919 * i386-opc.h (CpuSSE4_2_Or_ABM): New. 920 (CpuLM): Updated. 921 (i386_cpu_flags): Add cpusse4_2_or_abm. 922 923 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of 924 CpuABM|CpuSSE4_2 on popcnt. 925 * i386-init.h: Regenerated. 926 * i386-tbl.h: Likewise. 927 928 2008-01-02 H.J. Lu <hongjiu.lu (a] intel.com> 929 930 * i386-opc.h: Update comments. 931 932 2008-01-02 H.J. Lu <hongjiu.lu (a] intel.com> 933 934 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord. 935 * i386-opc.h: Likewise. 936 * i386-opc.tbl: Likewise. 937 938 2008-01-02 H.J. Lu <hongjiu.lu (a] intel.com> 939 940 PR gas/5534 941 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, 942 Byte, Word, Dword, QWord and Xmmword. 943 944 * i386-opc.h (No_xSuf): New. 945 (CheckSize): Likewise. 946 (Byte): Likewise. 947 (Word): Likewise. 948 (Dword): Likewise. 949 (QWord): Likewise. 950 (Xmmword): Likewise. 951 (FWait): Updated. 952 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, 953 Dword, QWord and Xmmword. 954 955 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is 956 used. 957 * i386-tbl.h: Regenerated. 958 959 2008-01-02 Mark Kettenis <kettenis (a] gnu.org> 960 961 * m88k-dis.c (instructions): Fix fcvt.* instructions. 962 From Miod Vallat. 963 964 For older changes see ChangeLog-2007 965 967 Local Variables: 968 mode: change-log 969 left-margin: 8 970 fill-column: 74 971 version-control: never 972 End: 973
Indexes created Mon Oct 26 00:26:21 UTC 2026