1 /* PREFIX_EVEX_0F2E */ 2 { 3 { "%XEvucomis%XS", { XMScalar, EXd, EXxEVexS }, 0 }, 4 { "vucomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 }, 5 { "%XEvucomis%XD", { XMScalar, EXq, EXxEVexS }, 0 }, 6 { "vucomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 }, 7 }, 8 /* PREFIX_EVEX_0F2F */ 9 { 10 { "%XEvcomis%XS", { XMScalar, EXd, EXxEVexS }, 0 }, 11 { "vcomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 }, 12 { "%XEvcomis%XD", { XMScalar, EXq, EXxEVexS }, 0 }, 13 { "vcomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 }, 14 }, 15 /* PREFIX_EVEX_0F5B */ 16 { 17 { VEX_W_TABLE (EVEX_W_0F5B_P_0) }, 18 { "%XEvcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 }, 19 { "%XEvcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 }, 20 }, 21 /* PREFIX_EVEX_0F6F */ 22 { 23 { Bad_Opcode }, 24 { VEX_W_TABLE (EVEX_W_0F6F_P_1) }, 25 { VEX_W_TABLE (EVEX_W_0F6F_P_2) }, 26 { VEX_W_TABLE (EVEX_W_0F6F_P_3) }, 27 }, 28 /* PREFIX_EVEX_0F70 */ 29 { 30 { Bad_Opcode }, 31 { "%XEvpshufhw", { XM, EXx, Ib }, 0 }, 32 { VEX_W_TABLE (EVEX_W_0F70_P_2) }, 33 { "%XEvpshuflw", { XM, EXx, Ib }, 0 }, 34 }, 35 /* PREFIX_EVEX_0F78 */ 36 { 37 { VEX_W_TABLE (EVEX_W_0F78_P_0) }, 38 { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 }, 39 { VEX_W_TABLE (EVEX_W_0F78_P_2) }, 40 { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 }, 41 }, 42 /* PREFIX_EVEX_0F79 */ 43 { 44 { VEX_W_TABLE (EVEX_W_0F79_P_0) }, 45 { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 }, 46 { VEX_W_TABLE (EVEX_W_0F79_P_2) }, 47 { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 }, 48 }, 49 /* PREFIX_EVEX_0F7A */ 50 { 51 { Bad_Opcode }, 52 { VEX_W_TABLE (EVEX_W_0F7A_P_1) }, 53 { VEX_W_TABLE (EVEX_W_0F7A_P_2) }, 54 { VEX_W_TABLE (EVEX_W_0F7A_P_3) }, 55 }, 56 /* PREFIX_EVEX_0F7B */ 57 { 58 { Bad_Opcode }, 59 { "vcvtusi2ssY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 60 { VEX_W_TABLE (EVEX_W_0F7B_P_2) }, 61 { "vcvtusi2sdY{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 }, 62 }, 63 /* PREFIX_EVEX_0F7E */ 64 { 65 { Bad_Opcode }, 66 { VEX_W_TABLE (EVEX_W_0F7E_P_1) }, 67 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) }, 68 }, 69 /* PREFIX_EVEX_0F7F */ 70 { 71 { Bad_Opcode }, 72 { VEX_W_TABLE (EVEX_W_0F7F_P_1) }, 73 { VEX_W_TABLE (EVEX_W_0F7F_P_2) }, 74 { VEX_W_TABLE (EVEX_W_0F7F_P_3) }, 75 }, 76 /* PREFIX_EVEX_0FC2 */ 77 { 78 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 79 { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 }, 80 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 81 { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 }, 82 }, 83 /* PREFIX_EVEX_0FE6 */ 84 { 85 { Bad_Opcode }, 86 { VEX_W_TABLE (EVEX_W_0FE6_P_1) }, 87 { "%XEvcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, 88 { "%XEvcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, 89 }, 90 /* PREFIX_EVEX_0F3810 */ 91 { 92 { Bad_Opcode }, 93 { VEX_W_TABLE (EVEX_W_0F3810_P_1) }, 94 { VEX_W_TABLE (EVEX_W_0F3810_P_2) }, 95 }, 96 /* PREFIX_EVEX_0F3811 */ 97 { 98 { Bad_Opcode }, 99 { VEX_W_TABLE (EVEX_W_0F3811_P_1) }, 100 { VEX_W_TABLE (EVEX_W_0F3811_P_2) }, 101 }, 102 /* PREFIX_EVEX_0F3812 */ 103 { 104 { Bad_Opcode }, 105 { VEX_W_TABLE (EVEX_W_0F3812_P_1) }, 106 { VEX_W_TABLE (EVEX_W_0F3812_P_2) }, 107 }, 108 /* PREFIX_EVEX_0F3813 */ 109 { 110 { Bad_Opcode }, 111 { VEX_W_TABLE (EVEX_W_0F3813_P_1) }, 112 { "%XEvcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 }, 113 }, 114 /* PREFIX_EVEX_0F3814 */ 115 { 116 { Bad_Opcode }, 117 { VEX_W_TABLE (EVEX_W_0F3814_P_1) }, 118 { "vprorv%DQ", { XM, Vex, EXx }, 0 }, 119 }, 120 /* PREFIX_EVEX_0F3815 */ 121 { 122 { Bad_Opcode }, 123 { VEX_W_TABLE (EVEX_W_0F3815_P_1) }, 124 { "vprolv%DQ", { XM, Vex, EXx }, 0 }, 125 }, 126 /* PREFIX_EVEX_0F3820 */ 127 { 128 { Bad_Opcode }, 129 { VEX_W_TABLE (EVEX_W_0F3820_P_1) }, 130 { "%XEvpmovsxbw", { XM, EXxmmq }, 0 }, 131 }, 132 /* PREFIX_EVEX_0F3821 */ 133 { 134 { Bad_Opcode }, 135 { VEX_W_TABLE (EVEX_W_0F3821_P_1) }, 136 { "%XEvpmovsxbd", { XM, EXxmmqd }, 0 }, 137 }, 138 /* PREFIX_EVEX_0F3822 */ 139 { 140 { Bad_Opcode }, 141 { VEX_W_TABLE (EVEX_W_0F3822_P_1) }, 142 { "%XEvpmovsxbq", { XM, EXxmmdw }, 0 }, 143 }, 144 /* PREFIX_EVEX_0F3823 */ 145 { 146 { Bad_Opcode }, 147 { VEX_W_TABLE (EVEX_W_0F3823_P_1) }, 148 { "%XEvpmovsxwd", { XM, EXxmmq }, 0 }, 149 }, 150 /* PREFIX_EVEX_0F3824 */ 151 { 152 { Bad_Opcode }, 153 { VEX_W_TABLE (EVEX_W_0F3824_P_1) }, 154 { "%XEvpmovsxwq", { XM, EXxmmqd }, 0 }, 155 }, 156 /* PREFIX_EVEX_0F3825 */ 157 { 158 { Bad_Opcode }, 159 { VEX_W_TABLE (EVEX_W_0F3825_P_1) }, 160 { VEX_W_TABLE (EVEX_W_0F3825_P_2) }, 161 }, 162 /* PREFIX_EVEX_0F3826 */ 163 { 164 { Bad_Opcode }, 165 { "vptestnm%BW", { MaskG, Vex, EXx }, 0 }, 166 { "vptestm%BW", { MaskG, Vex, EXx }, 0 }, 167 }, 168 /* PREFIX_EVEX_0F3827 */ 169 { 170 { Bad_Opcode }, 171 { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 }, 172 { "vptestm%DQ", { MaskG, Vex, EXx }, 0 }, 173 }, 174 /* PREFIX_EVEX_0F3828 */ 175 { 176 { Bad_Opcode }, 177 { "vpmovm2Y%BW", { XM, MaskR }, 0 }, 178 { VEX_W_TABLE (EVEX_W_0F3828_P_2) }, 179 }, 180 /* PREFIX_EVEX_0F3829 */ 181 { 182 { Bad_Opcode }, 183 { "vpmov%BW2mY", { MaskG, Ux }, 0 }, 184 { VEX_W_TABLE (EVEX_W_0F3829_P_2) }, 185 }, 186 /* PREFIX_EVEX_0F382A */ 187 { 188 { Bad_Opcode }, 189 { VEX_W_TABLE (EVEX_W_0F382A_P_1) }, 190 { VEX_W_TABLE (EVEX_W_0F382A_P_2) }, 191 }, 192 /* PREFIX_EVEX_0F3830 */ 193 { 194 { Bad_Opcode }, 195 { VEX_W_TABLE (EVEX_W_0F3830_P_1) }, 196 { "%XEvpmovzxbw", { XM, EXxmmq }, 0 }, 197 }, 198 /* PREFIX_EVEX_0F3831 */ 199 { 200 { Bad_Opcode }, 201 { VEX_W_TABLE (EVEX_W_0F3831_P_1) }, 202 { "%XEvpmovzxbd", { XM, EXxmmqd }, 0 }, 203 }, 204 /* PREFIX_EVEX_0F3832 */ 205 { 206 { Bad_Opcode }, 207 { VEX_W_TABLE (EVEX_W_0F3832_P_1) }, 208 { "%XEvpmovzxbq", { XM, EXxmmdw }, 0 }, 209 }, 210 /* PREFIX_EVEX_0F3833 */ 211 { 212 { Bad_Opcode }, 213 { VEX_W_TABLE (EVEX_W_0F3833_P_1) }, 214 { "%XEvpmovzxwd", { XM, EXxmmq }, 0 }, 215 }, 216 /* PREFIX_EVEX_0F3834 */ 217 { 218 { Bad_Opcode }, 219 { VEX_W_TABLE (EVEX_W_0F3834_P_1) }, 220 { "%XEvpmovzxwq", { XM, EXxmmqd }, 0 }, 221 }, 222 /* PREFIX_EVEX_0F3835 */ 223 { 224 { Bad_Opcode }, 225 { VEX_W_TABLE (EVEX_W_0F3835_P_1) }, 226 { VEX_W_TABLE (EVEX_W_0F3835_P_2) }, 227 }, 228 /* PREFIX_EVEX_0F3838 */ 229 { 230 { Bad_Opcode }, 231 { "vpmovm2Y%DQ", { XM, MaskR }, 0 }, 232 { "%XEvpminsb", { XM, Vex, EXx }, 0 }, 233 }, 234 /* PREFIX_EVEX_0F3839 */ 235 { 236 { Bad_Opcode }, 237 { "vpmov%DQ2mY", { MaskG, Ux }, 0 }, 238 { "%XEvpmins%DQ", { XM, Vex, EXx }, 0 }, 239 }, 240 /* PREFIX_EVEX_0F383A */ 241 { 242 { Bad_Opcode }, 243 { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, 244 { "%XEvpminuw", { XM, Vex, EXx }, 0 }, 245 }, 246 /* PREFIX_EVEX_0F384A_W_0_L_2 */ 247 { 248 { Bad_Opcode }, 249 { "tcvtrowd2ps", { XM, Rtmm, VexGdq }, 0 }, 250 { "tilemovrow", { XM, Rtmm, VexGdq }, 0 }, 251 }, 252 /* PREFIX_EVEX_0F3852 */ 253 { 254 { "vdpphp%XS", { XM, Vex, EXx }, 0 }, 255 { "vdpbf16p%XS", { XM, Vex, EXx }, 0 }, 256 { VEX_W_TABLE (VEX_W_0F3852) }, 257 { "vp4dpws%XSd", { XM, Vex, Mxmm }, 0 }, 258 }, 259 /* PREFIX_EVEX_0F3853 */ 260 { 261 { Bad_Opcode }, 262 { Bad_Opcode }, 263 { VEX_W_TABLE (VEX_W_0F3853) }, 264 { "vp4dpws%XSds", { XM, Vex, Mxmm }, 0 }, 265 }, 266 /* PREFIX_EVEX_0F3868 */ 267 { 268 { Bad_Opcode }, 269 { Bad_Opcode }, 270 { Bad_Opcode }, 271 { "vp2intersectY%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 }, 272 }, 273 /* PREFIX_EVEX_0F386D_W_0_L_2 */ 274 { 275 { "tcvtrowps2phh", { XM, Rtmm, VexGdq }, 0 }, 276 { "tcvtrowps2bf16l", { XM, Rtmm, VexGdq }, 0 }, 277 { "tcvtrowps2phl", { XM, Rtmm, VexGdq }, 0 }, 278 { "tcvtrowps2bf16h", { XM, Rtmm, VexGdq }, 0 }, 279 }, 280 /* PREFIX_EVEX_0F3872 */ 281 { 282 { Bad_Opcode }, 283 { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 }, 284 { VEX_W_TABLE (EVEX_W_0F3872_P_2) }, 285 { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 }, 286 }, 287 /* PREFIX_EVEX_0F3874 */ 288 { 289 { "vcvtbiasp%XH2bf8", { XMxmmq, Vex, EXxh }, 0 }, 290 { "vcvtp%XH2bf8%XY", { XMxmmq, EXxh }, 0 }, 291 { Bad_Opcode }, 292 { "vcvt2p%XH2bf8", { XM, Vex, EXxh }, 0 }, 293 }, 294 /* PREFIX_EVEX_0F389A */ 295 { 296 { Bad_Opcode }, 297 { Bad_Opcode }, 298 { "%XEvfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 299 { "v4fmaddp%XS", { XM, Vex, Mxmm }, 0 }, 300 }, 301 /* PREFIX_EVEX_0F389B */ 302 { 303 { Bad_Opcode }, 304 { Bad_Opcode }, 305 { "%XEvfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 }, 306 { "v4fmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 }, 307 }, 308 /* PREFIX_EVEX_0F38AA */ 309 { 310 { Bad_Opcode }, 311 { Bad_Opcode }, 312 { "%XEvfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 313 { "v4fnmaddp%XS", { XM, Vex, Mxmm }, 0 }, 314 }, 315 /* PREFIX_EVEX_0F38AB */ 316 { 317 { Bad_Opcode }, 318 { Bad_Opcode }, 319 { "%XEvfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 }, 320 { "v4fnmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 }, 321 }, 322 /* PREFIX_EVEX_0F3A07_W_0_L_2 */ 323 { 324 { "tcvtrowps2phh", { XM, Rtmm, Ib }, 0 }, 325 { "tcvtrowd2ps", { XM, Rtmm, Ib }, 0 }, 326 { "tilemovrow", { XM, Rtmm, Ib }, 0 }, 327 { "tcvtrowps2bf16h", { XM, Rtmm, Ib }, 0 }, 328 }, 329 /* PREFIX_EVEX_0F3A08 */ 330 { 331 { "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 332 { Bad_Opcode }, 333 { "vrndscalep%XS", { XM, EXx, EXxEVexS, Ib }, 0 }, 334 { "vrndscale%XB", { XM, EXxh, Ib }, 0 }, 335 }, 336 /* PREFIX_EVEX_0F3A0A */ 337 { 338 { "vrndscales%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 339 { Bad_Opcode }, 340 { "vrndscales%XS", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 }, 341 }, 342 /* PREFIX_EVEX_0F3A26 */ 343 { 344 { "vgetmantp%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 345 { Bad_Opcode }, 346 { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 }, 347 { "vgetmant%XB", { XM, EXxh, Ib }, 0 }, 348 }, 349 /* PREFIX_EVEX_0F3A27 */ 350 { 351 { "vgetmants%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 352 { Bad_Opcode }, 353 { "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, 354 }, 355 /* PREFIX_EVEX_0F3A42_W_0 */ 356 { 357 { Bad_Opcode }, 358 { "%XEvmpsadbw", { XM, Vex, EXx, Ib }, 0 }, 359 { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 }, 360 }, 361 /* PREFIX_EVEX_0F3A52 */ 362 { 363 { "vminmaxp%XH", { XM, Vex, EXxh, EXxEVexS, Ib }, 0 }, 364 { Bad_Opcode }, 365 { "vminmaxp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 }, 366 { "vminmax%XB", { XM, Vex, EXxh, Ib }, 0 }, 367 }, 368 /* PREFIX_EVEX_0F3A53 */ 369 { 370 { "vminmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 371 { Bad_Opcode }, 372 { "vminmaxs%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, 373 }, 374 /* PREFIX_EVEX_0F3A56 */ 375 { 376 { "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, 377 { Bad_Opcode }, 378 { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, 0 }, 379 { "vreduce%XB", { XM, EXxh, Ib }, 0 }, 380 }, 381 /* PREFIX_EVEX_0F3A57 */ 382 { 383 { "vreduces%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, 384 { Bad_Opcode }, 385 { "vreduces%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, 386 }, 387 /* PREFIX_EVEX_0F3A66 */ 388 { 389 { "vfpclassp%XH%XZ", { MaskG, EXxh, Ib }, 0 }, 390 { Bad_Opcode }, 391 { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, 0 }, 392 { "vfpclass%XB%XZ", { MaskG, EXxh, Ib }, 0 }, 393 }, 394 /* PREFIX_EVEX_0F3A67 */ 395 { 396 { "vfpclasss%XH", { MaskG, EXw, Ib }, 0 }, 397 { Bad_Opcode }, 398 { "vfpclasss%XW", { MaskG, EXdq, Ib }, 0 }, 399 }, 400 /* PREFIX_EVEX_0F3A77_W_0_L_2 */ 401 { 402 { Bad_Opcode }, 403 { "tcvtrowps2bf16l", { XM, Rtmm, Ib }, 0 }, 404 { Bad_Opcode }, 405 { "tcvtrowps2phl", { XM, Rtmm, Ib }, 0 }, 406 }, 407 /* PREFIX_EVEX_0F3AC2 */ 408 { 409 { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 }, 410 { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 }, 411 { Bad_Opcode }, 412 { "vcmp%XB", { MaskG, Vex, EXxh, CMP }, 0 }, 413 }, 414 /* PREFIX_EVEX_MAP4_4x */ 415 { 416 { "%CFcmov%CCS", { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 }, 417 { Bad_Opcode }, 418 { "%CFcmov%CCS", { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 }, 419 { "set%ZU%CC", { Eb }, 0 }, 420 }, 421 /* PREFIX_EVEX_MAP4_F0 */ 422 { 423 { "crc32A", { Gdq, Eb }, 0 }, 424 { "invept", { Gm, Mo }, 0 }, 425 }, 426 /* PREFIX_EVEX_MAP4_F1 */ 427 { 428 { "crc32Q", { Gdq, Ev }, 0 }, 429 { "invvpid", { Gm, Mo }, 0 }, 430 { "crc32Q", { Gdq, Ev }, 0 }, 431 }, 432 /* PREFIX_EVEX_MAP4_F2 */ 433 { 434 { Bad_Opcode }, 435 { "invpcid", { Gm, M }, 0 }, 436 }, 437 /* PREFIX_EVEX_MAP4_F8 */ 438 { 439 { Bad_Opcode }, 440 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) }, 441 { "movdir64b", { Gva, M }, 0 }, 442 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) }, 443 }, 444 /* PREFIX_EVEX_MAP5_10 */ 445 { 446 { Bad_Opcode }, 447 { "vmovs%XH", { XMScalar, VexScalarR, EXw }, 0 }, 448 }, 449 /* PREFIX_EVEX_MAP5_11 */ 450 { 451 { Bad_Opcode }, 452 { "vmovs%XH", { EXwS, VexScalarR, XMScalar }, 0 }, 453 }, 454 /* PREFIX_EVEX_MAP5_18 */ 455 { 456 { "vcvtbiasp%XH2hf8", { XMxmmq, Vex, EXxh }, 0 }, 457 { "vcvtp%XH2hf8%XY", { XMxmmq, EXxh }, 0 }, 458 { Bad_Opcode }, 459 { "vcvt2p%XH2hf8", { XM, Vex, EXxh }, 0 }, 460 }, 461 /* PREFIX_EVEX_MAP5_1B */ 462 { 463 { "vcvtbiasp%XH2hf8s", { XMxmmq, Vex, EXxh }, 0 }, 464 { "vcvtp%XH2hf8s%XY", { XMxmmq, EXxh }, 0 }, 465 { Bad_Opcode }, 466 { "vcvt2p%XH2hf8s", { XM, Vex, EXxh }, 0 }, 467 }, 468 /* PREFIX_EVEX_MAP5_1D */ 469 { 470 { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, 471 { Bad_Opcode }, 472 { "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, 473 }, 474 /* PREFIX_EVEX_MAP5_1E */ 475 { 476 { Bad_Opcode }, 477 { Bad_Opcode }, 478 { Bad_Opcode }, 479 { "vcvthf82p%XH", { XM, EXxmmq }, 0 }, 480 }, 481 /* PREFIX_EVEX_MAP5_2A */ 482 { 483 { Bad_Opcode }, 484 { "vcvtsi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 485 }, 486 /* PREFIX_EVEX_MAP5_2C */ 487 { 488 { Bad_Opcode }, 489 { "vcvttsh2si", { Gdq, EXw, EXxEVexS }, 0 }, 490 }, 491 /* PREFIX_EVEX_MAP5_2D */ 492 { 493 { Bad_Opcode }, 494 { "vcvtsh2si", { Gdq, EXw, EXxEVexR }, 0 }, 495 }, 496 /* PREFIX_EVEX_MAP5_2E */ 497 { 498 { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 499 { "vucomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 500 }, 501 /* PREFIX_EVEX_MAP5_2F */ 502 { 503 { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 504 { "vcomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 }, 505 { "vcomis%XB", { XMScalar, EXw, EXxEVexS }, 0 }, 506 }, 507 /* PREFIX_EVEX_MAP5_51 */ 508 { 509 { "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 }, 510 { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 511 { "vsqrt%XB", { XM, EXxh }, 0 }, 512 }, 513 /* PREFIX_EVEX_MAP5_58 */ 514 { 515 { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 516 { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 517 { "vadd%XB", { XM, Vex, EXxh }, 0 }, 518 }, 519 /* PREFIX_EVEX_MAP5_59 */ 520 { 521 { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 522 { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 523 { "vmul%XB", { XM, Vex, EXxh }, 0 }, 524 }, 525 /* PREFIX_EVEX_MAP5_5A */ 526 { 527 { "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 }, 528 { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 529 { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 }, 530 { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, 531 }, 532 /* PREFIX_EVEX_MAP5_5B */ 533 { 534 { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) }, 535 { "vcvttp%XH2dq", { XM, EXxmmqh, EXxEVexS }, 0 }, 536 { "vcvtp%XH2dq", { XM, EXxmmqh, EXxEVexR }, 0 }, 537 }, 538 /* PREFIX_EVEX_MAP5_5C */ 539 { 540 { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 541 { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 542 { "vsub%XB", { XM, Vex, EXxh }, 0 }, 543 }, 544 /* PREFIX_EVEX_MAP5_5D */ 545 { 546 { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 }, 547 { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 548 { "vmin%XB", { XM, Vex, EXxh }, 0 }, 549 }, 550 /* PREFIX_EVEX_MAP5_5E */ 551 { 552 { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 553 { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 }, 554 { "vdiv%XB", { XM, Vex, EXxh }, 0 }, 555 }, 556 /* PREFIX_EVEX_MAP5_5F */ 557 { 558 { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 }, 559 { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 560 { "vmax%XB", { XM, Vex, EXxh }, 0 }, 561 }, 562 /* PREFIX_EVEX_MAP5_68 */ 563 { 564 { "vcvttp%XH2ibs", { XM, EXxh, EXxEVexS }, 0 }, 565 { Bad_Opcode }, 566 { "vcvttp%XS2ibs", { XM, EXx, EXxEVexS }, 0 }, 567 { "vcvtt%XB2ibs", { XM, EXxh }, 0 }, 568 }, 569 /* PREFIX_EVEX_MAP5_69 */ 570 { 571 { "vcvtp%XH2ibs", { XM, EXxh, EXxEVexR }, 0 }, 572 { Bad_Opcode }, 573 { "vcvtp%XS2ibs", { XM, EXx, EXxEVexR }, 0 }, 574 { "vcvt%XB2ibs", { XM, EXxh }, 0 }, 575 }, 576 /* PREFIX_EVEX_MAP5_6A */ 577 { 578 { "vcvttp%XH2iubs", { XM, EXxh, EXxEVexS }, 0 }, 579 { Bad_Opcode }, 580 { "vcvttp%XS2iubs", { XM, EXx, EXxEVexS }, 0 }, 581 { "vcvtt%XB2iubs", { XM, EXxh }, 0 }, 582 }, 583 /* PREFIX_EVEX_MAP5_6B */ 584 { 585 { "vcvtp%XH2iubs", { XM, EXxh, EXxEVexR }, 0 }, 586 { Bad_Opcode }, 587 { "vcvtp%XS2iubs", { XM, EXx, EXxEVexR }, 0 }, 588 { "vcvt%XB2iubs", { XM, EXxh }, 0 }, 589 }, 590 /* PREFIX_EVEX_MAP5_6C */ 591 { 592 { VEX_W_TABLE (EVEX_W_MAP5_6C_P_0) }, 593 { "vcvttss2usis", { Gdq, EXd, EXxEVexS }, 0 }, 594 { VEX_W_TABLE (EVEX_W_MAP5_6C_P_2) }, 595 { "vcvttsd2usis", { Gdq, EXq, EXxEVexS }, 0 }, 596 }, 597 /* PREFIX_EVEX_MAP5_6D */ 598 { 599 { VEX_W_TABLE (EVEX_W_MAP5_6D_P_0) }, 600 { "vcvttss2sis", { Gdq, EXd, EXxEVexS }, 0 }, 601 { VEX_W_TABLE (EVEX_W_MAP5_6D_P_2) }, 602 { "vcvttsd2sis", { Gdq, EXq, EXxEVexS }, 0 }, 603 }, 604 /* PREFIX_EVEX_MAP5_6E_L_0 */ 605 { 606 { Bad_Opcode }, 607 { VEX_W_TABLE (EVEX_W_MAP5_6E_P_1) }, 608 { "vmovwY", { XMScalar, Edw }, 0 }, 609 }, 610 /* PREFIX_EVEX_MAP5_6F_X86_64 */ 611 { 612 { Bad_Opcode }, 613 { "vmovrs%DQ", { XM, Mx }, 0 }, 614 { Bad_Opcode }, 615 { "vmovrs%BW", { XM, Mx }, 0 }, 616 }, 617 /* PREFIX_EVEX_MAP5_74 */ 618 { 619 { "vcvtbiasp%XH2bf8s", { XMxmmq, Vex, EXxh }, 0 }, 620 { "vcvtp%XH2bf8s%XY", { XMxmmq, EXxh }, 0 }, 621 { Bad_Opcode }, 622 { "vcvt2p%XH2bf8s", { XM, Vex, EXxh }, 0 }, 623 }, 624 /* PREFIX_EVEX_MAP5_78 */ 625 { 626 { "vcvttp%XH2udq", { XM, EXxmmqh, EXxEVexS }, 0 }, 627 { "vcvttsh2usi", { Gdq, EXw, EXxEVexS }, 0 }, 628 { "vcvttp%XH2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 }, 629 }, 630 /* PREFIX_EVEX_MAP5_79 */ 631 { 632 { "vcvtp%XH2udq", { XM, EXxmmqh, EXxEVexR }, 0 }, 633 { "vcvtsh2usi", { Gdq, EXw, EXxEVexR }, 0 }, 634 { "vcvtp%XH2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 }, 635 }, 636 /* PREFIX_EVEX_MAP5_7A */ 637 { 638 { Bad_Opcode }, 639 { Bad_Opcode }, 640 { "vcvttp%XH2qq", { XM, EXxmmqdh, EXxEVexS }, 0 }, 641 { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) }, 642 }, 643 /* PREFIX_EVEX_MAP5_7B */ 644 { 645 { Bad_Opcode }, 646 { "vcvtusi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 647 { "vcvtp%XH2qq", { XM, EXxmmqdh, EXxEVexR }, 0 }, 648 }, 649 /* PREFIX_EVEX_MAP5_7C */ 650 { 651 { "vcvttp%XH2uw", { XM, EXxh, EXxEVexS }, 0 }, 652 { Bad_Opcode }, 653 { "vcvttp%XH2w", { XM, EXxh, EXxEVexS }, 0 }, 654 }, 655 /* PREFIX_EVEX_MAP5_7D */ 656 { 657 { "vcvtp%XH2uw", { XM, EXxh, EXxEVexR }, 0 }, 658 { "vcvtw2p%XH", { XM, EXxh, EXxEVexR }, 0 }, 659 { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 }, 660 { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 }, 661 }, 662 /* PREFIX_EVEX_MAP5_7E_L_0 */ 663 { 664 { Bad_Opcode }, 665 { VEX_W_TABLE (EVEX_W_MAP5_7E_P_1) }, 666 { "vmovw", { Edw, XMScalar }, 0 }, 667 }, 668 /* PREFIX_EVEX_MAP6_13 */ 669 { 670 { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, 671 { Bad_Opcode }, 672 { "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 }, 673 }, 674 /* PREFIX_EVEX_MAP6_2C */ 675 { 676 { "vscalef%XB", { XM, Vex, EXxh }, 0 }, 677 { Bad_Opcode }, 678 { "vscalefp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 679 }, 680 /* PREFIX_EVEX_MAP6_42 */ 681 { 682 { "vgetexp%XB", { XM, EXxh }, 0 }, 683 { Bad_Opcode }, 684 { "vgetexpp%XH", { XM, EXxh, EXxEVexS }, 0 }, 685 }, 686 /* PREFIX_EVEX_MAP6_4C */ 687 { 688 { "vrcp%XB", { XM, EXxh }, 0 }, 689 { Bad_Opcode }, 690 { "vrcpp%XH", { XM, EXxh }, 0 }, 691 }, 692 /* PREFIX_EVEX_MAP6_4E */ 693 { 694 { "vrsqrt%XB", { XM, EXxh }, 0 }, 695 { Bad_Opcode }, 696 { "vrsqrtp%XH", { XM, EXxh }, 0 }, 697 }, 698 /* PREFIX_EVEX_MAP6_56 */ 699 { 700 { Bad_Opcode }, 701 { "vfmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 702 { Bad_Opcode }, 703 { "vfcmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 704 }, 705 /* PREFIX_EVEX_MAP6_57 */ 706 { 707 { Bad_Opcode }, 708 { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 709 { Bad_Opcode }, 710 { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 711 }, 712 /* PREFIX_EVEX_MAP6_98 */ 713 { 714 { "vfmadd132%XB", { XM, Vex, EXxh }, 0 }, 715 { Bad_Opcode }, 716 { "vfmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 717 }, 718 /* PREFIX_EVEX_MAP6_9A */ 719 { 720 { "vfmsub132%XB", { XM, Vex, EXxh }, 0 }, 721 { Bad_Opcode }, 722 { "vfmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 723 }, 724 /* PREFIX_EVEX_MAP6_9C */ 725 { 726 { "vfnmadd132%XB", { XM, Vex, EXxh }, 0 }, 727 { Bad_Opcode }, 728 { "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 729 }, 730 /* PREFIX_EVEX_MAP6_9E */ 731 { 732 { "vfnmsub132%XB", { XM, Vex, EXxh }, 0 }, 733 { Bad_Opcode }, 734 { "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 735 }, 736 /* PREFIX_EVEX_MAP6_A8 */ 737 { 738 { "vfmadd213%XB", { XM, Vex, EXxh }, 0 }, 739 { Bad_Opcode }, 740 { "vfmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 741 }, 742 /* PREFIX_EVEX_MAP6_AA */ 743 { 744 { "vfmsub213%XB", { XM, Vex, EXxh }, 0 }, 745 { Bad_Opcode }, 746 { "vfmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 747 }, 748 /* PREFIX_EVEX_MAP6_AC */ 749 { 750 { "vfnmadd213%XB", { XM, Vex, EXxh }, 0 }, 751 { Bad_Opcode }, 752 { "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 753 }, 754 /* PREFIX_EVEX_MAP6_AE */ 755 { 756 { "vfnmsub213%XB", { XM, Vex, EXxh }, 0 }, 757 { Bad_Opcode }, 758 { "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 759 }, 760 /* PREFIX_EVEX_MAP6_B8 */ 761 { 762 { "vfmadd231%XB", { XM, Vex, EXxh }, 0 }, 763 { Bad_Opcode }, 764 { "vfmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 765 }, 766 /* PREFIX_EVEX_MAP6_BA */ 767 { 768 { "vfmsub231%XB", { XM, Vex, EXxh }, 0 }, 769 { Bad_Opcode }, 770 { "vfmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 771 }, 772 /* PREFIX_EVEX_MAP6_BC */ 773 { 774 { "vfnmadd231%XB", { XM, Vex, EXxh }, 0 }, 775 { Bad_Opcode }, 776 { "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 777 }, 778 /* PREFIX_EVEX_MAP6_BE */ 779 { 780 { "vfnmsub231%XB", { XM, Vex, EXxh }, 0 }, 781 { Bad_Opcode }, 782 { "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 }, 783 }, 784 /* PREFIX_EVEX_MAP6_D6 */ 785 { 786 { Bad_Opcode }, 787 { "vfmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 788 { Bad_Opcode }, 789 { "vfcmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 }, 790 }, 791 /* PREFIX_EVEX_MAP6_D7 */ 792 { 793 { Bad_Opcode }, 794 { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 795 { Bad_Opcode }, 796 { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 }, 797 }, 798