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      1   1.1  mrg ; Options for the DEC Alpha port of the compiler
      2   1.1  mrg ;
      3  1.12  mrg ; Copyright (C) 2005-2022 Free Software Foundation, Inc.
      4   1.1  mrg ;
      5   1.1  mrg ; This file is part of GCC.
      6   1.1  mrg ;
      7   1.1  mrg ; GCC is free software; you can redistribute it and/or modify it under
      8   1.1  mrg ; the terms of the GNU General Public License as published by the Free
      9   1.1  mrg ; Software Foundation; either version 3, or (at your option) any later
     10   1.1  mrg ; version.
     11   1.1  mrg ;
     12   1.1  mrg ; GCC is distributed in the hope that it will be useful, but WITHOUT
     13   1.1  mrg ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14   1.1  mrg ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15   1.1  mrg ; License for more details.
     16   1.1  mrg ;
     17   1.1  mrg ; You should have received a copy of the GNU General Public License
     18   1.1  mrg ; along with GCC; see the file COPYING3.  If not see
     19   1.1  mrg ; <http://www.gnu.org/licenses/>.
     20   1.1  mrg 
     21   1.1  mrg msoft-float
     22  1.12  mrg Target Mask(SOFT_FP)
     23   1.6  mrg Do not use hardware fp.
     24   1.1  mrg 
     25   1.1  mrg mfp-regs
     26  1.12  mrg Target Mask(FPREGS)
     27   1.6  mrg Use fp registers.
     28   1.1  mrg 
     29   1.1  mrg mgas
     30   1.3  mrg Target Ignore
     31   1.3  mrg Does nothing. Preserved for backward compatibility.
     32   1.1  mrg 
     33   1.1  mrg mieee-conformant
     34   1.1  mrg Target RejectNegative Mask(IEEE_CONFORMANT)
     35   1.6  mrg Request IEEE-conformant math library routines (OSF/1).
     36   1.1  mrg 
     37   1.1  mrg mieee
     38  1.12  mrg Target RejectNegative Mask(IEEE)
     39   1.6  mrg Emit IEEE-conformant code, without inexact exceptions.
     40   1.1  mrg 
     41   1.1  mrg mieee-with-inexact
     42  1.12  mrg Target RejectNegative Mask(IEEE_WITH_INEXACT)
     43   1.1  mrg 
     44   1.1  mrg mbuild-constants
     45  1.12  mrg Target Mask(BUILD_CONSTANTS)
     46   1.6  mrg Do not emit complex integer constants to read-only memory.
     47   1.1  mrg 
     48   1.1  mrg mfloat-vax
     49  1.12  mrg Target RejectNegative Mask(FLOAT_VAX)
     50   1.6  mrg Use VAX fp.
     51   1.1  mrg 
     52   1.1  mrg mfloat-ieee
     53  1.12  mrg Target RejectNegative InverseMask(FLOAT_VAX)
     54   1.6  mrg Do not use VAX fp.
     55   1.1  mrg 
     56   1.1  mrg mbwx
     57  1.12  mrg Target Mask(BWX)
     58   1.6  mrg Emit code for the byte/word ISA extension.
     59   1.1  mrg 
     60   1.1  mrg mmax
     61  1.12  mrg Target Mask(MAX)
     62   1.6  mrg Emit code for the motion video ISA extension.
     63   1.1  mrg 
     64   1.1  mrg mfix
     65  1.12  mrg Target Mask(FIX)
     66   1.6  mrg Emit code for the fp move and sqrt ISA extension.
     67   1.1  mrg 
     68   1.1  mrg mcix
     69  1.12  mrg Target Mask(CIX)
     70   1.6  mrg Emit code for the counting ISA extension.
     71   1.1  mrg 
     72   1.1  mrg mexplicit-relocs
     73  1.12  mrg Target Mask(EXPLICIT_RELOCS)
     74   1.6  mrg Emit code using explicit relocation directives.
     75   1.1  mrg 
     76   1.1  mrg msmall-data
     77  1.12  mrg Target RejectNegative Mask(SMALL_DATA)
     78   1.6  mrg Emit 16-bit relocations to the small data areas.
     79   1.1  mrg 
     80   1.1  mrg mlarge-data
     81  1.12  mrg Target RejectNegative InverseMask(SMALL_DATA)
     82   1.6  mrg Emit 32-bit relocations to the small data areas.
     83   1.1  mrg 
     84   1.1  mrg msmall-text
     85  1.12  mrg Target RejectNegative Mask(SMALL_TEXT)
     86   1.6  mrg Emit direct branches to local functions.
     87   1.1  mrg 
     88   1.1  mrg mlarge-text
     89  1.12  mrg Target RejectNegative InverseMask(SMALL_TEXT)
     90   1.6  mrg Emit indirect branches to local functions.
     91   1.1  mrg 
     92   1.1  mrg mtls-kernel
     93  1.12  mrg Target Mask(TLS_KERNEL)
     94   1.6  mrg Emit rdval instead of rduniq for thread pointer.
     95   1.1  mrg 
     96   1.1  mrg mlong-double-128
     97  1.12  mrg Target RejectNegative Mask(LONG_DOUBLE_128)
     98   1.6  mrg Use 128-bit long double.
     99   1.1  mrg 
    100   1.1  mrg mlong-double-64
    101  1.12  mrg Target RejectNegative InverseMask(LONG_DOUBLE_128)
    102   1.6  mrg Use 64-bit long double.
    103   1.1  mrg 
    104   1.1  mrg mcpu=
    105   1.1  mrg Target RejectNegative Joined Var(alpha_cpu_string)
    106   1.6  mrg Use features of and schedule given CPU.
    107   1.1  mrg 
    108   1.1  mrg mtune=
    109   1.1  mrg Target RejectNegative Joined Var(alpha_tune_string)
    110   1.6  mrg Schedule given CPU.
    111   1.1  mrg 
    112   1.1  mrg mfp-rounding-mode=
    113   1.1  mrg Target RejectNegative Joined Var(alpha_fprm_string)
    114   1.6  mrg Control the generated fp rounding mode.
    115   1.1  mrg 
    116   1.1  mrg mfp-trap-mode=
    117   1.1  mrg Target RejectNegative Joined Var(alpha_fptm_string)
    118   1.6  mrg Control the IEEE trap mode.
    119   1.1  mrg 
    120   1.1  mrg mtrap-precision=
    121   1.1  mrg Target RejectNegative Joined Var(alpha_tp_string)
    122   1.6  mrg Control the precision given to fp exceptions.
    123   1.1  mrg 
    124   1.1  mrg mmemory-latency=
    125   1.1  mrg Target RejectNegative Joined Var(alpha_mlat_string)
    126   1.6  mrg Tune expected memory latency.
    127   1.1  mrg 
    128   1.1  mrg mtls-size=
    129   1.1  mrg Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32)
    130   1.6  mrg Specify bit size of immediate TLS offsets.
    131