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      1 ;; Common predicate definitions for ARM, Thumb and AArch64
      2 ;; Copyright (C) 2020-2022 Free Software Foundation, Inc.
      3 ;; Contributed by Fujitsu Ltd.
      4 
      5 ;; This file is part of GCC.
      6 
      7 ;; GCC is free software; you can redistribute it and/or modify it
      8 ;; under the terms of the GNU General Public License as published
      9 ;; by the Free Software Foundation; either version 3, or (at your
     10 ;; option) any later version.
     11 
     12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
     13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15 ;; License for more details.
     16 
     17 ;; You should have received a copy of the GNU General Public License
     18 ;; along with GCC; see the file COPYING3.  If not see
     19 ;; <http://www.gnu.org/licenses/>.
     20 
     21 ;; Return true if constant is CONST_INT >= 1 and <= 4
     22 (define_predicate "const_1_to_4_operand"
     23   (and (match_code "const_int")
     24        (match_test "IN_RANGE (INTVAL (op), 1, 4)")))
     25 
     26 ;; Return true if constant is 2 or 4 or 8 or 16
     27 (define_predicate "const_2_4_8_16_operand"
     28   (and (match_code "const_int")
     29        (match_test ("   INTVAL (op) == 2
     30                      || INTVAL (op) == 4
     31                      || INTVAL (op) == 8
     32                      || INTVAL (op) == 16 "))))
     33 
     34 ;; Return true if shift type is lsl and amount is in[1,4].
     35 (define_predicate "alu_shift_operator_lsl_1_to_4"
     36   (and (match_code "ashift")
     37        (match_test "const_1_to_4_operand (XEXP (op, 1), mode)")))
     38 
     39 ;; Return true if the operand is register.
     40 (define_predicate "alu_shift_reg_p"
     41   (match_test "register_operand (XEXP (op, 1), mode)"))
     42