common.md revision 1.1 1 1.1 mrg ;; Common predicate definitions for ARM, Thumb and AArch64
2 1.1 mrg ;; Copyright (C) 2020-2022 Free Software Foundation, Inc.
3 1.1 mrg ;; Contributed by Fujitsu Ltd.
4 1.1 mrg
5 1.1 mrg ;; This file is part of GCC.
6 1.1 mrg
7 1.1 mrg ;; GCC is free software; you can redistribute it and/or modify it
8 1.1 mrg ;; under the terms of the GNU General Public License as published
9 1.1 mrg ;; by the Free Software Foundation; either version 3, or (at your
10 1.1 mrg ;; option) any later version.
11 1.1 mrg
12 1.1 mrg ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 1.1 mrg ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 1.1 mrg ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 1.1 mrg ;; License for more details.
16 1.1 mrg
17 1.1 mrg ;; You should have received a copy of the GNU General Public License
18 1.1 mrg ;; along with GCC; see the file COPYING3. If not see
19 1.1 mrg ;; <http://www.gnu.org/licenses/>.
20 1.1 mrg
21 1.1 mrg ;; Return true if constant is CONST_INT >= 1 and <= 4
22 1.1 mrg (define_predicate "const_1_to_4_operand"
23 1.1 mrg (and (match_code "const_int")
24 1.1 mrg (match_test "IN_RANGE (INTVAL (op), 1, 4)")))
25 1.1 mrg
26 1.1 mrg ;; Return true if constant is 2 or 4 or 8 or 16
27 1.1 mrg (define_predicate "const_2_4_8_16_operand"
28 1.1 mrg (and (match_code "const_int")
29 1.1 mrg (match_test (" INTVAL (op) == 2
30 1.1 mrg || INTVAL (op) == 4
31 1.1 mrg || INTVAL (op) == 8
32 1.1 mrg || INTVAL (op) == 16 "))))
33 1.1 mrg
34 1.1 mrg ;; Return true if shift type is lsl and amount is in[1,4].
35 1.1 mrg (define_predicate "alu_shift_operator_lsl_1_to_4"
36 1.1 mrg (and (match_code "ashift")
37 1.1 mrg (match_test "const_1_to_4_operand (XEXP (op, 1), mode)")))
38 1.1 mrg
39 1.1 mrg ;; Return true if the operand is register.
40 1.1 mrg (define_predicate "alu_shift_reg_p"
41 1.1 mrg (match_test "register_operand (XEXP (op, 1), mode)"))
42