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      1 ; Options for the ATMEL AVR port of the compiler.
      2 
      3 ; Copyright (C) 2005-2022 Free Software Foundation, Inc.
      4 ;
      5 ; This file is part of GCC.
      6 ;
      7 ; GCC is free software; you can redistribute it and/or modify it under
      8 ; the terms of the GNU General Public License as published by the Free
      9 ; Software Foundation; either version 3, or (at your option) any later
     10 ; version.
     11 ;
     12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
     13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
     14 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
     15 ; for more details.
     16 ;
     17 ; You should have received a copy of the GNU General Public License
     18 ; along with GCC; see the file COPYING3.  If not see
     19 ; <http://www.gnu.org/licenses/>.
     20 
     21 mcall-prologues
     22 Target Mask(CALL_PROLOGUES)
     23 Use subroutines for function prologues and epilogues.
     24 
     25 mmcu=
     26 Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or architecture after %qs)
     27 -mmcu=MCU	Select the target MCU.
     28 
     29 mgas-isr-prologues
     30 Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization
     31 Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
     32 
     33 mn-flash=
     34 Target RejectNegative Joined Var(avr_n_flash) UInteger Init(-1)
     35 Set the number of 64 KiB flash segments.
     36 
     37 mskip-bug
     38 Target Mask(SKIP_BUG)
     39 Indicate presence of a processor erratum.
     40 
     41 mrmw
     42 Target Mask(RMW)
     43 Enable Read-Modify-Write (RMW) instructions support/use.
     44 
     45 mdeb
     46 Target Undocumented Mask(ALL_DEBUG)
     47 
     48 mlog=
     49 Target RejectNegative Joined Undocumented Var(avr_log_details)
     50 
     51 mshort-calls
     52 Target RejectNegative Mask(SHORT_CALLS)
     53 Use RJMP / RCALL even though CALL / JMP are available.
     54 
     55 mint8
     56 Target Mask(INT8)
     57 Use an 8-bit 'int' type.
     58 
     59 mno-interrupts
     60 Target RejectNegative Mask(NO_INTERRUPTS)
     61 Change the stack pointer without disabling interrupts.
     62 
     63 mbranch-cost=
     64 Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization
     65 Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
     66 
     67 mmain-is-OS_task
     68 Target Mask(MAIN_IS_OS_TASK) Optimization
     69 Treat main as if it had attribute OS_task.
     70 
     71 morder1
     72 Target Undocumented Mask(ORDER_1)
     73 
     74 morder2
     75 Target Undocumented Mask(ORDER_2)
     76 
     77 mtiny-stack
     78 Target Mask(TINY_STACK)
     79 Change only the low 8 bits of the stack pointer.
     80 
     81 mrelax
     82 Target
     83 Relax branches.
     84 
     85 mpmem-wrap-around
     86 Target
     87 Make the linker relaxation machine assume that a program counter wrap-around occurs.
     88 
     89 maccumulate-args
     90 Target Mask(ACCUMULATE_OUTGOING_ARGS)
     91 Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf.
     92 
     93 mstrict-X
     94 Target Var(avr_strict_X) Init(0)
     95 When accessing RAM, use X as imposed by the hardware, i.e. just use pre-decrement, post-increment and indirect addressing with the X register.  Without this option, the compiler may assume that there is an addressing mode X+const similar to Y+const and Z+const and emit instructions to emulate such an addressing mode for X.
     96 
     97 ;; For rationale behind -msp8 see explanation in avr.h.
     98 msp8
     99 Target RejectNegative Var(avr_sp8) Init(0)
    100 The device has no SPH special function register. This option will be overridden by the compiler driver with the correct setting if presence/absence of SPH can be deduced from -mmcu=MCU.
    101 
    102 Waddr-space-convert
    103 Warning C Var(avr_warn_addr_space_convert) Init(0)
    104 Warn if the address space of an address is changed.
    105 
    106 Wmisspelled-isr
    107 Warning C C++ Var(avr_warn_misspelled_isr) Init(1)
    108 Warn if the ISR is misspelled, i.e. without __vector prefix. Enabled by default.
    109 
    110 mfract-convert-truncate
    111 Target Mask(FRACT_CONV_TRUNC)
    112 Allow to use truncation instead of rounding towards zero for fractional fixed-point types.
    113 
    114 mabsdata
    115 Target Mask(ABSDATA)
    116 Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices.
    117 
    118 mdouble=
    119 Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save
    120 -mdouble=<BITS>	Use <BITS> bits wide double type.
    121 
    122 mlong-double=
    123 Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save
    124 -mlong-double=<BITS>	Use <BITS> bits wide long double type.
    125 
    126 nodevicelib
    127 Driver Target RejectNegative
    128 Do not link against the device-specific library lib<MCU>.a.
    129 
    130 nodevicespecs
    131 Driver Target RejectNegative
    132 Do not use the device-specific specs file device-specs/specs-<MCU>.
    133 
    134 Enum
    135 Name(avr_bits_e) Type(int)
    136 Available BITS selections:
    137 
    138 EnumValue
    139 Enum(avr_bits_e) String(32)  Value(32)
    140 
    141 EnumValue
    142 Enum(avr_bits_e) String(64) Value(64)
    143