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      1 ;; Predicate definitions for FT32
      2 ;; Copyright (C) 2015-2022 Free Software Foundation, Inc.
      3 ;; Contributed by FTDI <support (a] ftdi.com>
      4 
      5 ;; This file is part of GCC.
      6 
      7 ;; GCC is free software; you can redistribute it and/or modify it
      8 ;; under the terms of the GNU General Public License as published
      9 ;; by the Free Software Foundation; either version 3, or (at your
     10 ;; option) any later version.
     11 
     12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
     13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15 ;; License for more details.
     16 
     17 ;; You should have received a copy of the GNU General Public License
     18 ;; along with GCC; see the file COPYING3.  If not see
     19 ;; <http://www.gnu.org/licenses/>.
     20 
     21 ;; -------------------------------------------------------------------------
     22 ;; Predicates
     23 ;; -------------------------------------------------------------------------
     24 
     25 ;; Nonzero if OP can be source of a simple move operation.
     26 ;;
     27 ;; The CONST_INT could really be CONST if we were to fix
     28 ;; ft32_print_operand_address to format the address correctly.
     29 ;; It might require assembler/linker work as well to ensure
     30 ;; the right relocation is emitted.
     31 
     32 (define_predicate "ft32_general_movsrc_operand"
     33   (match_code "mem,const_int,reg,subreg,symbol_ref,label_ref,const")
     34 {
     35   /* Any (MEM LABEL_REF) is OK.  That is a pc-relative load.  */
     36   if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == LABEL_REF)
     37     return 1;
     38 
     39   if (MEM_P (op)
     40       && GET_CODE (XEXP (op, 0)) == PLUS
     41       && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
     42       && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
     43     return 1;
     44 
     45   return general_operand (op, mode);
     46 })
     47 
     48 (define_predicate "ft32_general_movdst_operand"
     49   (match_code "mem,const_int,reg,subreg,symbol_ref,label_ref,const")
     50 {
     51   if (MEM_P (op)
     52       && GET_CODE (XEXP (op, 0)) == PLUS
     53       && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
     54       && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
     55     return 1;
     56   if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == SYMBOL_REF)
     57     return 1;
     58   return REG_P(op) ||
     59          (MEM_P(op) && REG_P(XEXP (op, 0)));
     60 })
     61 
     62 (define_predicate "reg_indirect"
     63   (match_code "mem")
     64 {
     65   return (MEM_P(op) && REG_P(XEXP (op, 0)));
     66 })
     67 
     68 ;; Nonzero if OP can be an operand to an add/inc/dec instruction.
     69 
     70 (define_predicate "ft32_add_operand"
     71   (ior (match_code "reg")
     72        (and (match_code "const_int")
     73             (match_test "IN_RANGE (INTVAL (op), -32768, 32767)"))))
     74 
     75 ;; Nonzero if OP can be an operand to an sub/dec instruction.
     76 
     77 (define_predicate "ft32_sub_operand"
     78   (ior (match_code "reg")
     79        (and (match_code "const_int")
     80             (match_test "IN_RANGE (INTVAL (op), -32767, 32768)"))))
     81 
     82 
     83 (define_predicate "ft32_rimm_operand"
     84   (ior (match_code "reg")
     85        (and (match_code "const_int")
     86             (match_test "IN_RANGE (INTVAL (op), -512, 511)"))))
     87 
     88 (define_predicate "ft32_imm_operand"
     89   (and (match_code "const_int")
     90        (match_test "IN_RANGE (INTVAL (op), -512, 511)")))
     91 
     92 (define_predicate "ft32_bwidth_operand"
     93   (and (match_code "const_int")
     94        (match_test "IN_RANGE (INTVAL (op), 1, 16)")))
     95